✓ Fi.CI.BAT: success for drm/i915: Register define cleanups

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Title: Project List - Patchwork
Patch Details
Series:drm/i915: Register define cleanups
URL:https://patchwork.freedesktop.org/series/96868/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21579/index.html

CI Bug Log - changes from CI_DRM_10877 -> Patchwork_21579

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_21579/index.html

Participating hosts (30 -> 29)

Additional (2): fi-skl-6700k2 fi-pnv-d510
Missing (3): fi-bsw-cyan bat-dg1-6 bat-dg1-5

Known issues

Here are the changes found in Patchwork_21579 that come from known issues:

IGT changes

Issues hit

Build changes

CI-20190529: 20190529
CI_DRM_10877: 688d3ea17a90b4acf51de31ef08cd2b23799952e @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6280: 246bfd31dba6bf184b26b170d91d72c90a54be6b @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_21579: f89511a6ac520ed572057ab4153692b6c59cb1d7 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

f89511a6ac52 drm/i915: Clean up FPGA_DBG/CLAIM_ER bits
1b63beb57cdd drm/i915: Clean up DPINVGTT/VLV_DPFLIPSTAT bits
8a7681e19c01 drm/i915: Clean up CRC register defines
9f255d46dcb8 drm/i915: Clean up PIPESRC defines
0a96d6cd3a6a drm/i915: Clean up PCH_TRANSCONF/TRANS_DP_CTL bit defines
0a60b5b4e2d5 drm/i915: Clean up PIPECONF bit defines
972a671d657e drm/i915: Clean up SKL_BOTTOM_COLOR defines
d6e456b58dab drm/i915: Clean up PIPEMISC register defines
07e09e2bbe21 drm/i915: Bump DSL linemask to 20 bits


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