Hi Ville,
Thanks for the patch and getting a unified approach for DP, HDMI and DFP
for YCbCr420 output.
I am trying to have 8k@60 YUV420 via an HDMI2.1 PCON, without having to
use PCONs Color conversion capability,
but running into different issues, and failing miserably. I think this
patch series will help get there.
There are a couple of queries and suggestions I have regarding the big
joiner and DSC, which I'll reply to the patches.
I will also try to test these on the setup I have available.
Thanks & Regards,
Ankit
On 10/15/2021 7:09 PM, Ville Syrjala wrote:
From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
Currently we're failing to respect the sink's max TMDS clock
in the DP HDMI DFP code, and exceeding them means the sink
won't show a picture [1]. So let's improve the situation by
checking those limits, and generally fixing up a bunch things
in the deep color/4:2:0 related stuff for both native HDMI
and DP HDMI DFPs.
The end result is fairly unified apporach to this stuff on
both sides of the aisle. There's probably more we could try
to abstract to share even more code. But that will need a lot
of actual thought so leave it for later.
The high level algorithm is basically now:
for_each(respect TMDS clock limits, disrespect TMDS clock limits)
for_each(YCbCr 4:2:0 only, RGB 4:4:4, YCbCr 4:2:0 also)
for_each(12bpc,10bpc,8bpc)
compute_and_check_the_things
with some obvious tweaks for HDMI vs. DP specifics.
[1] https://gitlab.freedesktop.org/drm/intel/-/issues/4095
Ville Syrjälä (20):
drm/i915/hdmi: Split intel_hdmi_bpc_possible() to source vs. sink pair
drm/i915/hdmi: Introduce intel_hdmi_is_ycbr420()
drm/i915/hdmi: Introduce intel_hdmi_tmds_clock()
drm/i915/hdmi: Unify "4:2:0 also" logic between .mode_valid() and
.compute_config()
drm/i915/hdmi: Extract intel_hdmi_output_format()
drm/i915/hdmi: Clean up TMDS clock limit exceeding user mode handling
drm/i915/hdmi: Simplify intel_hdmi_mode_clock_valid()
drm/i915/dp: Reuse intel_hdmi_tmds_clock()
drm/i915/dp: Extract intel_dp_tmds_clock_valid()
drm/i915/dp: Respect the sink's max TMDS clock when dealing with
DP->HDMI DFPs
drm/i915/dp: Extract intel_dp_has_audio()
drm/i915/dp: s/intel_dp_hdmi_ycbcr420/intel_dp_is_ycbcr420/
drm/i915/dp: Reorder intel_dp_compute_config() a bit
drm/i915/dp: Pass around intel_connector rather than drm_connector
drm/i915/dp: Make intel_dp_output_format() usable for "4:2:0 also"
modes
drm/i915/dp: Rework HDMI DFP TMDS clock handling
drm/i915/dp: Add support for "4:2:0 also" modes for DP
drm/i915/dp: Duplicate native HDMI TMDS clock limit handling for DP
HDMI DFPs
drm/i915/dp: Fix DFP rgb->ycbcr conversion matrix
drm/i915/dp: Disable DFP RGB->YCbCr conversion for now
drivers/gpu/drm/i915/display/intel_dp.c | 339 +++++++++++++---------
drivers/gpu/drm/i915/display/intel_hdmi.c | 220 ++++++++------
drivers/gpu/drm/i915/display/intel_hdmi.h | 5 +-
3 files changed, 342 insertions(+), 222 deletions(-)
