On Tue, Oct 26, 2021 at 11:42:07AM +0300, Jani Nikula wrote:
> The intermediate value 1000000 * 10 * 9671 overflows 32 bits, so force
> promotion to a bigger type.
>
> >From the logs:
>
> [drm:intel_dp_compute_config [i915]] DP link rate required 3657063 available -580783288
>
> Fixes: 48efd014f0ea ("drm/i915/dp: add max data rate calculation for UHBR rates")
> Cc: Manasi Navare <manasi.d.navare@xxxxxxxxx>
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_dp.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_dp.c b/drivers/gpu/drm/i915/display/intel_dp.c
> index f5dc2126d140..9a0cd2e1ebea 100644
> --- a/drivers/gpu/drm/i915/display/intel_dp.c
> +++ b/drivers/gpu/drm/i915/display/intel_dp.c
> @@ -352,7 +352,7 @@ intel_dp_max_data_rate(int max_link_rate, int max_lanes)
> */
> int max_link_rate_kbps = max_link_rate * 10;
>
> - max_link_rate_kbps = DIV_ROUND_CLOSEST_ULL(max_link_rate_kbps * 9671, 10000);
> + max_link_rate_kbps = DIV_ROUND_CLOSEST_ULL(max_link_rate_kbps * 9671UL, 10000UL);
UL is not 64bit on 32bit architectures. Also having a 64bit divisor
would be wasteful.
DIV_ROUND_CLOSEST_ULL(mul_u32_u32(...), 10000);
> max_link_rate = max_link_rate_kbps / 8;
> }
>
> --
> 2.30.2
--
Ville Syrjälä
Intel
