On Tue, 05 Oct 2021, Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> On Tue, Oct 05, 2021 at 08:56:36PM +0300, Jani Nikula wrote:
>> For the time being, neither the power sequencer nor the backlight code
>> properly support two eDP panels simultaneously. While the software
>> states will be independent, the same sets of registers will be used for
>> both eDP panels, clobbering the hardware state and leading to errors.
>>
>> Gracefully disable dual eDP until proper support has been added.
>>
>> Cc: José Roberto de Souza <jose.souza@xxxxxxxxx>
>> Cc: Uma Shankar <uma.shankar@xxxxxxxxx>
>> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>> Cc: Swati Sharma <swati2.sharma@xxxxxxxxx>
>> Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx>
>> ---
>> drivers/gpu/drm/i915/display/intel_bios.c | 47 +++++++++++++++++++++++
>> 1 file changed, 47 insertions(+)
>>
>> diff --git a/drivers/gpu/drm/i915/display/intel_bios.c b/drivers/gpu/drm/i915/display/intel_bios.c
>> index f9776ca85de3..b99907c656bb 100644
>> --- a/drivers/gpu/drm/i915/display/intel_bios.c
>> +++ b/drivers/gpu/drm/i915/display/intel_bios.c
>> @@ -1930,6 +1930,50 @@ static int _intel_bios_max_tmds_clock(const struct intel_bios_encoder_data *devd
>> }
>> }
>>
>> +static enum port get_edp_port(struct drm_i915_private *i915)
>> +{
>> + const struct intel_bios_encoder_data *devdata;
>> + enum port port;
>> +
>> + for_each_port(port) {
>> + devdata = i915->vbt.ports[port];
>> +
>> + if (devdata && intel_bios_encoder_supports_edp(devdata))
>> + return port;
>> + }
>> +
>> + return PORT_NONE;
>> +}
>> +
>> +/*
>> + * FIXME: The power sequencer and backlight code currently do not support more
>> + * than one set registers, at least not on anything other than VLV/CHV. It will
>> + * clobber the registers. As a temporary workaround, gracefully prevent more
>> + * than one eDP from being registered.
>> + */
>> +static void sanitize_dual_edp(struct intel_bios_encoder_data *devdata,
>> + enum port port)
>> +{
>> + struct drm_i915_private *i915 = devdata->i915;
>> + struct child_device_config *child = &devdata->child;
>> + enum port p;
>> +
>> + /* CHV might not clobber PPS registers. */
>> + if (IS_CHERRYVIEW(i915))
>
> vlv and chv should both behave identically. At least I don't remember
> any single eDP assumptions in the code for either.
This bit of code is not run on VLV, only CHV and DDI. It's subtle.
> Hmm. Quick glance suggest bxt/glk should handle this correctly
> as well? But the more recent platforms are certainly borked.
> Well, that's assuming the vbt related bits are correct for bxt/glk.
VLV/CHV figure out the PPS in a complicated manner, and use pipe
specific backlight. They might work.
BXT/GLK look at VBT for the pps/backlight index, but that's just the
*one* number. All the structures are set up nicely, but then they use
the same set of registers for all panels.
The recent failure mode was a really weird looking VDD warn, and it just
turned out to be two intel_pps instances using the same registers and
getting royally confused about the sw/hw states.
We'd need to figure out the per-panel pps/backlight to use from VBT, for
each panel, and then set that up.
BR,
Jani.
>
>> + return;
>> +
>> + p = get_edp_port(i915);
>> + if (p == PORT_NONE)
>> + return;
>> +
>> + drm_dbg_kms(&i915->drm, "both ports %c and %c configured as eDP, "
>> + "disabling port %c eDP\n", port_name(p), port_name(port),
>> + port_name(port));
>> +
>> + child->device_type &= ~DEVICE_TYPE_DISPLAYPORT_OUTPUT;
>> + child->device_type &= ~DEVICE_TYPE_INTERNAL_CONNECTOR;
>> +}
>> +
>> static bool is_port_valid(struct drm_i915_private *i915, enum port port)
>> {
>> /*
>> @@ -1987,6 +2031,9 @@ static void parse_ddi_port(struct drm_i915_private *i915,
>> supports_typec_usb, supports_tbt,
>> devdata->dsc != NULL);
>>
>> + if (is_edp)
>> + sanitize_dual_edp(devdata, port);
>> +
>> if (is_dvi)
>> sanitize_ddc_pin(devdata, port);
>>
>> --
>> 2.30.2
--
Jani Nikula, Intel Open Source Graphics Center
