From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> I had a few hours to burn the other day and so ended up accidentally implementing per-lane drive settings for DP. This series contains just the platform agnostic prep parts, and enabling it for LTTPRs. I'll follow up with the platform specific hw pokey stuff later. Ville Syrjälä (9): drm/i915: s/ddi_translations/trans/ drm/i915: Generalize .set_signal_levels() drm/i915: Nuke usless .set_signal_levels() wrappers drm/i915: De-wrapper bxt_ddi_phy_set_signal_levels() drm/i915: Hoover the level>=n_entries WARN into intel_ddi_level() drm/i915: Nuke intel_ddi_hdmi_num_entries() drm/i915: Pass the lane to intel_ddi_level() drm/i915: Prepare link training for per-lane drive settings drm/i915: Allow per-lane drive settings with LTTPRs drivers/gpu/drm/i915/display/g4x_dp.c | 33 +- drivers/gpu/drm/i915/display/intel_ddi.c | 310 +++------ drivers/gpu/drm/i915/display/intel_ddi.h | 7 +- .../drm/i915/display/intel_ddi_buf_trans.c | 640 +++++++++--------- .../drm/i915/display/intel_ddi_buf_trans.h | 4 - .../drm/i915/display/intel_display_types.h | 5 +- .../drm/i915/display/intel_dp_link_training.c | 73 +- drivers/gpu/drm/i915/display/intel_dpio_phy.c | 28 +- drivers/gpu/drm/i915/display/intel_dpio_phy.h | 5 +- drivers/gpu/drm/i915/display/intel_snps_phy.c | 21 +- drivers/gpu/drm/i915/display/intel_snps_phy.h | 5 +- 11 files changed, 530 insertions(+), 601 deletions(-) -- 2.32.0
