On Thu, May 09, 2013 at 08:03:18PM -0300, Rodrigo Vivi wrote:
> drm_i915_private is getting bigger and bigger when adding new vbt stuff.
> So, the better way of getting drm_i915_private organized is to create
> a special structure for vbt stuff.
>
> v2: Basically conflicts fixes
>
> Reviewed-by: Jani Nikula <jani.nikula at intel.com>
> Signed-off-by: Rodrigo Vivi <rodrigo.vivi at gmail.com>
Queued for -next, thanks for the patch.
-Daniel
> ---
> drivers/gpu/drm/i915/i915_dma.c | 8 +--
> drivers/gpu/drm/i915/i915_drv.h | 57 +++++++++++---------
> drivers/gpu/drm/i915/intel_bios.c | 100 +++++++++++++++++------------------
> drivers/gpu/drm/i915/intel_crt.c | 4 +-
> drivers/gpu/drm/i915/intel_display.c | 12 ++---
> drivers/gpu/drm/i915/intel_dp.c | 18 +++----
> drivers/gpu/drm/i915/intel_lvds.c | 16 +++---
> drivers/gpu/drm/i915/intel_pm.c | 2 +-
> drivers/gpu/drm/i915/intel_sdvo.c | 6 +--
> drivers/gpu/drm/i915/intel_tv.c | 8 +--
> 10 files changed, 119 insertions(+), 112 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/i915_dma.c b/drivers/gpu/drm/i915/i915_dma.c
> index a1648eb..f5addac 100644
> --- a/drivers/gpu/drm/i915/i915_dma.c
> +++ b/drivers/gpu/drm/i915/i915_dma.c
> @@ -1742,10 +1742,10 @@ int i915_driver_unload(struct drm_device *dev)
> * free the memory space allocated for the child device
> * config parsed from VBT
> */
> - if (dev_priv->child_dev && dev_priv->child_dev_num) {
> - kfree(dev_priv->child_dev);
> - dev_priv->child_dev = NULL;
> - dev_priv->child_dev_num = 0;
> + if (dev_priv->vbt.child_dev && dev_priv->vbt.child_dev_num) {
> + kfree(dev_priv->vbt.child_dev);
> + dev_priv->vbt.child_dev = NULL;
> + dev_priv->vbt.child_dev_num = 0;
> }
>
> vga_switcheroo_unregister_client(dev->pdev);
> diff --git a/drivers/gpu/drm/i915/i915_drv.h b/drivers/gpu/drm/i915/i915_drv.h
> index ab172c2..10d0fc4 100644
> --- a/drivers/gpu/drm/i915/i915_drv.h
> +++ b/drivers/gpu/drm/i915/i915_drv.h
> @@ -889,6 +889,37 @@ enum modeset_restore {
> MODESET_SUSPENDED,
> };
>
> +struct intel_vbt_data {
> + struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
> + struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
> +
> + /* Feature bits */
> + unsigned int int_tv_support:1;
> + unsigned int lvds_dither:1;
> + unsigned int lvds_vbt:1;
> + unsigned int int_crt_support:1;
> + unsigned int lvds_use_ssc:1;
> + unsigned int display_clock_mode:1;
> + unsigned int fdi_rx_polarity_inverted:1;
> + int lvds_ssc_freq;
> + unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
> +
> + /* eDP */
> + int edp_rate;
> + int edp_lanes;
> + int edp_preemphasis;
> + int edp_vswing;
> + bool edp_initialized;
> + bool edp_support;
> + int edp_bpp;
> + struct edp_power_seq edp_pps;
> +
> + int crt_ddc_pin;
> +
> + int child_dev_num;
> + struct child_device_config *child_dev;
> +};
> +
> typedef struct drm_i915_private {
> struct drm_device *dev;
> struct kmem_cache *slab;
> @@ -968,6 +999,7 @@ typedef struct drm_i915_private {
> struct intel_fbc_work *fbc_work;
>
> struct intel_opregion opregion;
> + struct intel_vbt_data vbt;
>
> /* overlay */
> struct intel_overlay *overlay;
> @@ -984,31 +1016,8 @@ typedef struct drm_i915_private {
> /* LVDS info */
> struct drm_display_mode *lfp_lvds_vbt_mode; /* if any */
> struct drm_display_mode *sdvo_lvds_vbt_mode; /* if any */
> -
> - /* Feature bits from the VBIOS */
> - unsigned int int_tv_support:1;
> - unsigned int lvds_dither:1;
> - unsigned int lvds_vbt:1;
> - unsigned int int_crt_support:1;
> - unsigned int lvds_use_ssc:1;
> - unsigned int display_clock_mode:1;
> - unsigned int fdi_rx_polarity_inverted:1;
> - int lvds_ssc_freq;
> - unsigned int bios_lvds_val; /* initial [PCH_]LVDS reg val in VBIOS */
> - struct {
> - int rate;
> - int lanes;
> - int preemphasis;
> - int vswing;
> -
> - bool initialized;
> - bool support;
> - int bpp;
> - struct edp_power_seq pps;
> - } edp;
> bool no_aux_handshake;
>
> - int crt_ddc_pin;
> struct drm_i915_fence_reg fence_regs[I915_MAX_NUM_FENCES]; /* assume 965 */
> int fence_reg_start; /* 4 if userland hasn't ioctl'd us yet */
> int num_fence_regs; /* 8 on pre-965, 16 otherwise */
> @@ -1050,8 +1059,6 @@ typedef struct drm_i915_private {
> /* indicates the reduced downclock for LVDS*/
> int lvds_downclock;
> u16 orig_clock;
> - int child_dev_num;
> - struct child_device_config *child_dev;
>
> bool mchbar_need_disable;
>
> diff --git a/drivers/gpu/drm/i915/intel_bios.c b/drivers/gpu/drm/i915/intel_bios.c
> index 95070b2..53f2bed 100644
> --- a/drivers/gpu/drm/i915/intel_bios.c
> +++ b/drivers/gpu/drm/i915/intel_bios.c
> @@ -212,7 +212,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
> if (!lvds_options)
> return;
>
> - dev_priv->lvds_dither = lvds_options->pixel_dither;
> + dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
> if (lvds_options->panel_type == 0xff)
> return;
>
> @@ -226,7 +226,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
> if (!lvds_lfp_data_ptrs)
> return;
>
> - dev_priv->lvds_vbt = 1;
> + dev_priv->vbt.lvds_vbt = 1;
>
> panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
> lvds_lfp_data_ptrs,
> @@ -238,7 +238,7 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
>
> fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
>
> - dev_priv->lfp_lvds_vbt_mode = panel_fixed_mode;
> + dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
>
> DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
> drm_mode_debug_printmodeline(panel_fixed_mode);
> @@ -274,9 +274,9 @@ parse_lfp_panel_data(struct drm_i915_private *dev_priv,
> /* check the resolution, just to be sure */
> if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
> fp_timing->y_res == panel_fixed_mode->vdisplay) {
> - dev_priv->bios_lvds_val = fp_timing->lvds_reg_val;
> + dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
> DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
> - dev_priv->bios_lvds_val);
> + dev_priv->vbt.bios_lvds_val);
> }
> }
> }
> @@ -316,7 +316,7 @@ parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
>
> fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
>
> - dev_priv->sdvo_lvds_vbt_mode = panel_fixed_mode;
> + dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
>
> DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
> drm_mode_debug_printmodeline(panel_fixed_mode);
> @@ -345,20 +345,20 @@ parse_general_features(struct drm_i915_private *dev_priv,
>
> general = find_section(bdb, BDB_GENERAL_FEATURES);
> if (general) {
> - dev_priv->int_tv_support = general->int_tv_support;
> - dev_priv->int_crt_support = general->int_crt_support;
> - dev_priv->lvds_use_ssc = general->enable_ssc;
> - dev_priv->lvds_ssc_freq =
> + dev_priv->vbt.int_tv_support = general->int_tv_support;
> + dev_priv->vbt.int_crt_support = general->int_crt_support;
> + dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
> + dev_priv->vbt.lvds_ssc_freq =
> intel_bios_ssc_frequency(dev, general->ssc_freq);
> - dev_priv->display_clock_mode = general->display_clock_mode;
> - dev_priv->fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
> + dev_priv->vbt.display_clock_mode = general->display_clock_mode;
> + dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
> DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
> - dev_priv->int_tv_support,
> - dev_priv->int_crt_support,
> - dev_priv->lvds_use_ssc,
> - dev_priv->lvds_ssc_freq,
> - dev_priv->display_clock_mode,
> - dev_priv->fdi_rx_polarity_inverted);
> + dev_priv->vbt.int_tv_support,
> + dev_priv->vbt.int_crt_support,
> + dev_priv->vbt.lvds_use_ssc,
> + dev_priv->vbt.lvds_ssc_freq,
> + dev_priv->vbt.display_clock_mode,
> + dev_priv->vbt.fdi_rx_polarity_inverted);
> }
> }
>
> @@ -375,7 +375,7 @@ parse_general_definitions(struct drm_i915_private *dev_priv,
> int bus_pin = general->crt_ddc_gmbus_pin;
> DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
> if (intel_gmbus_is_port_valid(bus_pin))
> - dev_priv->crt_ddc_pin = bus_pin;
> + dev_priv->vbt.crt_ddc_pin = bus_pin;
> } else {
> DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
> block_size);
> @@ -486,7 +486,7 @@ parse_driver_features(struct drm_i915_private *dev_priv,
>
> if (SUPPORTS_EDP(dev) &&
> driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
> - dev_priv->edp.support = 1;
> + dev_priv->vbt.edp_support = 1;
>
> if (driver->dual_frequency)
> dev_priv->render_reclock_avail = true;
> @@ -501,20 +501,20 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
>
> edp = find_section(bdb, BDB_EDP);
> if (!edp) {
> - if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->edp.support)
> + if (SUPPORTS_EDP(dev_priv->dev) && dev_priv->vbt.edp_support)
> DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
> return;
> }
>
> switch ((edp->color_depth >> (panel_type * 2)) & 3) {
> case EDP_18BPP:
> - dev_priv->edp.bpp = 18;
> + dev_priv->vbt.edp_bpp = 18;
> break;
> case EDP_24BPP:
> - dev_priv->edp.bpp = 24;
> + dev_priv->vbt.edp_bpp = 24;
> break;
> case EDP_30BPP:
> - dev_priv->edp.bpp = 30;
> + dev_priv->vbt.edp_bpp = 30;
> break;
> }
>
> @@ -522,48 +522,48 @@ parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
> edp_pps = &edp->power_seqs[panel_type];
> edp_link_params = &edp->link_params[panel_type];
>
> - dev_priv->edp.pps = *edp_pps;
> + dev_priv->vbt.edp_pps = *edp_pps;
>
> - dev_priv->edp.rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
> + dev_priv->vbt.edp_rate = edp_link_params->rate ? DP_LINK_BW_2_7 :
> DP_LINK_BW_1_62;
> switch (edp_link_params->lanes) {
> case 0:
> - dev_priv->edp.lanes = 1;
> + dev_priv->vbt.edp_lanes = 1;
> break;
> case 1:
> - dev_priv->edp.lanes = 2;
> + dev_priv->vbt.edp_lanes = 2;
> break;
> case 3:
> default:
> - dev_priv->edp.lanes = 4;
> + dev_priv->vbt.edp_lanes = 4;
> break;
> }
> switch (edp_link_params->preemphasis) {
> case 0:
> - dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
> + dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_0;
> break;
> case 1:
> - dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
> + dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_3_5;
> break;
> case 2:
> - dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
> + dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_6;
> break;
> case 3:
> - dev_priv->edp.preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
> + dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPHASIS_9_5;
> break;
> }
> switch (edp_link_params->vswing) {
> case 0:
> - dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_400;
> + dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_400;
> break;
> case 1:
> - dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_600;
> + dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_600;
> break;
> case 2:
> - dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_800;
> + dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_800;
> break;
> case 3:
> - dev_priv->edp.vswing = DP_TRAIN_VOLTAGE_SWING_1200;
> + dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_1200;
> break;
> }
> }
> @@ -611,13 +611,13 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
> DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
> return;
> }
> - dev_priv->child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
> - if (!dev_priv->child_dev) {
> + dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
> + if (!dev_priv->vbt.child_dev) {
> DRM_DEBUG_KMS("No memory space for child device\n");
> return;
> }
>
> - dev_priv->child_dev_num = count;
> + dev_priv->vbt.child_dev_num = count;
> count = 0;
> for (i = 0; i < child_device_num; i++) {
> p_child = &(p_defs->devices[i]);
> @@ -625,7 +625,7 @@ parse_device_mapping(struct drm_i915_private *dev_priv,
> /* skip the device block if device type is invalid */
> continue;
> }
> - child_dev_ptr = dev_priv->child_dev + count;
> + child_dev_ptr = dev_priv->vbt.child_dev + count;
> count++;
> memcpy((void *)child_dev_ptr, (void *)p_child,
> sizeof(*p_child));
> @@ -638,23 +638,23 @@ init_vbt_defaults(struct drm_i915_private *dev_priv)
> {
> struct drm_device *dev = dev_priv->dev;
>
> - dev_priv->crt_ddc_pin = GMBUS_PORT_VGADDC;
> + dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
>
> /* LFP panel data */
> - dev_priv->lvds_dither = 1;
> - dev_priv->lvds_vbt = 0;
> + dev_priv->vbt.lvds_dither = 1;
> + dev_priv->vbt.lvds_vbt = 0;
>
> /* SDVO panel data */
> - dev_priv->sdvo_lvds_vbt_mode = NULL;
> + dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
>
> /* general features */
> - dev_priv->int_tv_support = 1;
> - dev_priv->int_crt_support = 1;
> + dev_priv->vbt.int_tv_support = 1;
> + dev_priv->vbt.int_crt_support = 1;
>
> /* Default to using SSC */
> - dev_priv->lvds_use_ssc = 1;
> - dev_priv->lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
> - DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->lvds_ssc_freq);
> + dev_priv->vbt.lvds_use_ssc = 1;
> + dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev, 1);
> + DRM_DEBUG_KMS("Set default to SSC at %dMHz\n", dev_priv->vbt.lvds_ssc_freq);
> }
>
> static int __init intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
> diff --git a/drivers/gpu/drm/i915/intel_crt.c b/drivers/gpu/drm/i915/intel_crt.c
> index 991e530..cc414f1 100644
> --- a/drivers/gpu/drm/i915/intel_crt.c
> +++ b/drivers/gpu/drm/i915/intel_crt.c
> @@ -442,7 +442,7 @@ static bool intel_crt_detect_ddc(struct drm_connector *connector)
>
> BUG_ON(crt->base.type != INTEL_OUTPUT_ANALOG);
>
> - i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
> + i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
> edid = intel_crt_get_edid(connector, i2c);
>
> if (edid) {
> @@ -648,7 +648,7 @@ static int intel_crt_get_modes(struct drm_connector *connector)
> int ret;
> struct i2c_adapter *i2c;
>
> - i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->crt_ddc_pin);
> + i2c = intel_gmbus_get_adapter(dev_priv, dev_priv->vbt.crt_ddc_pin);
> ret = intel_crt_ddc_get_modes(connector, i2c);
> if (ret || !IS_G4X(dev))
> return ret;
> diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c
> index 2b19f43..ab6bbb4 100644
> --- a/drivers/gpu/drm/i915/intel_display.c
> +++ b/drivers/gpu/drm/i915/intel_display.c
> @@ -4243,7 +4243,7 @@ static inline bool intel_panel_use_ssc(struct drm_i915_private *dev_priv)
> {
> if (i915_panel_use_ssc >= 0)
> return i915_panel_use_ssc != 0;
> - return dev_priv->lvds_use_ssc
> + return dev_priv->vbt.lvds_use_ssc
> && !(dev_priv->quirks & QUIRK_LVDS_SSC_DISABLE);
> }
>
> @@ -4279,7 +4279,7 @@ static int i9xx_get_refclk(struct drm_crtc *crtc, int num_connectors)
> refclk = vlv_get_refclk(crtc);
> } else if (intel_pipe_has_type(crtc, INTEL_OUTPUT_LVDS) &&
> intel_panel_use_ssc(dev_priv) && num_connectors < 2) {
> - refclk = dev_priv->lvds_ssc_freq * 1000;
> + refclk = dev_priv->vbt.lvds_ssc_freq * 1000;
> DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
> refclk / 1000);
> } else if (!IS_GEN2(dev)) {
> @@ -5070,7 +5070,7 @@ static void ironlake_init_pch_refclk(struct drm_device *dev)
> }
>
> if (HAS_PCH_IBX(dev)) {
> - has_ck505 = dev_priv->display_clock_mode;
> + has_ck505 = dev_priv->vbt.display_clock_mode;
> can_ssc = has_ck505;
> } else {
> has_ck505 = false;
> @@ -5387,8 +5387,8 @@ static int ironlake_get_refclk(struct drm_crtc *crtc)
>
> if (is_lvds && intel_panel_use_ssc(dev_priv) && num_connectors < 2) {
> DRM_DEBUG_KMS("using SSC reference clock of %d MHz\n",
> - dev_priv->lvds_ssc_freq);
> - return dev_priv->lvds_ssc_freq * 1000;
> + dev_priv->vbt.lvds_ssc_freq);
> + return dev_priv->vbt.lvds_ssc_freq * 1000;
> }
>
> return 120000;
> @@ -5684,7 +5684,7 @@ static uint32_t ironlake_compute_dpll(struct intel_crtc *intel_crtc,
> factor = 21;
> if (is_lvds) {
> if ((intel_panel_use_ssc(dev_priv) &&
> - dev_priv->lvds_ssc_freq == 100) ||
> + dev_priv->vbt.lvds_ssc_freq == 100) ||
> (HAS_PCH_IBX(dev) && intel_is_dual_link_lvds(dev)))
> factor = 25;
> } else if (is_sdvo && is_tv)
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index 3df1383..ca94185 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -755,10 +755,10 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> * recomments. This means we'll up-dither 16bpp framebuffers on
> * high-depth panels.
> */
> - if (is_edp(intel_dp) && dev_priv->edp.bpp) {
> + if (is_edp(intel_dp) && dev_priv->vbt.edp_bpp) {
> DRM_DEBUG_KMS("forcing bpp for eDP panel to BIOS-provided %i\n",
> - dev_priv->edp.bpp);
> - bpp = dev_priv->edp.bpp;
> + dev_priv->vbt.edp_bpp);
> + bpp = dev_priv->vbt.edp_bpp;
> }
>
> for (; bpp >= 6*3; bpp -= 2*3) {
> @@ -2773,11 +2773,11 @@ bool intel_dpd_is_edp(struct drm_device *dev)
> struct child_device_config *p_child;
> int i;
>
> - if (!dev_priv->child_dev_num)
> + if (!dev_priv->vbt.child_dev_num)
> return false;
>
> - for (i = 0; i < dev_priv->child_dev_num; i++) {
> - p_child = dev_priv->child_dev + i;
> + for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> + p_child = dev_priv->vbt.child_dev + i;
>
> if (p_child->dvo_port == PORT_IDPD &&
> p_child->device_type == DEVICE_TYPE_eDP)
> @@ -2855,7 +2855,7 @@ intel_dp_init_panel_power_sequencer(struct drm_device *dev,
> DRM_DEBUG_KMS("cur t1_t3 %d t8 %d t9 %d t10 %d t11_t12 %d\n",
> cur.t1_t3, cur.t8, cur.t9, cur.t10, cur.t11_t12);
>
> - vbt = dev_priv->edp.pps;
> + vbt = dev_priv->vbt.edp_pps;
>
> /* Upper limits from eDP 1.3 spec. Note that we use the clunky units of
> * our hw here, which are all in 100usec. */
> @@ -3114,8 +3114,8 @@ intel_dp_init_connector(struct intel_digital_port *intel_dig_port,
> }
>
> /* fallback to VBT if available for eDP */
> - if (!fixed_mode && dev_priv->lfp_lvds_vbt_mode) {
> - fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
> + if (!fixed_mode && dev_priv->vbt.lfp_lvds_vbt_mode) {
> + fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
> if (fixed_mode)
> fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
> }
> diff --git a/drivers/gpu/drm/i915/intel_lvds.c b/drivers/gpu/drm/i915/intel_lvds.c
> index d256fe4..e34e290 100644
> --- a/drivers/gpu/drm/i915/intel_lvds.c
> +++ b/drivers/gpu/drm/i915/intel_lvds.c
> @@ -735,11 +735,11 @@ static bool lvds_is_present_in_vbt(struct drm_device *dev,
> struct drm_i915_private *dev_priv = dev->dev_private;
> int i;
>
> - if (!dev_priv->child_dev_num)
> + if (!dev_priv->vbt.child_dev_num)
> return true;
>
> - for (i = 0; i < dev_priv->child_dev_num; i++) {
> - struct child_device_config *child = dev_priv->child_dev + i;
> + for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> + struct child_device_config *child = dev_priv->vbt.child_dev + i;
>
> /* If the device type is not LFP, continue.
> * We have to check both the new identifiers as well as the
> @@ -827,7 +827,7 @@ static bool compute_is_dual_link_lvds(struct intel_lvds_encoder *lvds_encoder)
> */
> val = I915_READ(lvds_encoder->reg);
> if (!(val & ~(LVDS_PIPE_MASK | LVDS_DETECTED)))
> - val = dev_priv->bios_lvds_val;
> + val = dev_priv->vbt.bios_lvds_val;
>
> return (val & LVDS_CLKB_POWER_MASK) == LVDS_CLKB_POWER_UP;
> }
> @@ -887,7 +887,7 @@ bool intel_lvds_init(struct drm_device *dev)
> if (HAS_PCH_SPLIT(dev)) {
> if ((I915_READ(PCH_LVDS) & LVDS_DETECTED) == 0)
> return false;
> - if (dev_priv->edp.support) {
> + if (dev_priv->vbt.edp_support) {
> DRM_DEBUG_KMS("disable LVDS for eDP support\n");
> return false;
> }
> @@ -1005,11 +1005,11 @@ bool intel_lvds_init(struct drm_device *dev)
> }
>
> /* Failed to get EDID, what about VBT? */
> - if (dev_priv->lfp_lvds_vbt_mode) {
> + if (dev_priv->vbt.lfp_lvds_vbt_mode) {
> DRM_DEBUG_KMS("using mode from VBT: ");
> - drm_mode_debug_printmodeline(dev_priv->lfp_lvds_vbt_mode);
> + drm_mode_debug_printmodeline(dev_priv->vbt.lfp_lvds_vbt_mode);
>
> - fixed_mode = drm_mode_duplicate(dev, dev_priv->lfp_lvds_vbt_mode);
> + fixed_mode = drm_mode_duplicate(dev, dev_priv->vbt.lfp_lvds_vbt_mode);
> if (fixed_mode) {
> fixed_mode->type |= DRM_MODE_TYPE_PREFERRED;
> goto out;
> diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c
> index c50d5b8..9ccfebc 100644
> --- a/drivers/gpu/drm/i915/intel_pm.c
> +++ b/drivers/gpu/drm/i915/intel_pm.c
> @@ -4389,7 +4389,7 @@ static void cpt_init_clock_gating(struct drm_device *dev)
> val = I915_READ(TRANS_CHICKEN2(pipe));
> val |= TRANS_CHICKEN2_TIMING_OVERRIDE;
> val &= ~TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
> - if (dev_priv->fdi_rx_polarity_inverted)
> + if (dev_priv->vbt.fdi_rx_polarity_inverted)
> val |= TRANS_CHICKEN2_FDI_POLARITY_REVERSED;
> val &= ~TRANS_CHICKEN2_FRAME_START_DELAY_MASK;
> val &= ~TRANS_CHICKEN2_DISABLE_DEEP_COLOR_COUNTER;
> diff --git a/drivers/gpu/drm/i915/intel_sdvo.c b/drivers/gpu/drm/i915/intel_sdvo.c
> index a618a6a..c0a012a 100644
> --- a/drivers/gpu/drm/i915/intel_sdvo.c
> +++ b/drivers/gpu/drm/i915/intel_sdvo.c
> @@ -1495,7 +1495,7 @@ intel_sdvo_get_analog_edid(struct drm_connector *connector)
>
> return drm_get_edid(connector,
> intel_gmbus_get_adapter(dev_priv,
> - dev_priv->crt_ddc_pin));
> + dev_priv->vbt.crt_ddc_pin));
> }
>
> static enum drm_connector_status
> @@ -1781,9 +1781,9 @@ static void intel_sdvo_get_lvds_modes(struct drm_connector *connector)
> goto end;
>
> /* Fetch modes from VBT */
> - if (dev_priv->sdvo_lvds_vbt_mode != NULL) {
> + if (dev_priv->vbt.sdvo_lvds_vbt_mode != NULL) {
> newmode = drm_mode_duplicate(connector->dev,
> - dev_priv->sdvo_lvds_vbt_mode);
> + dev_priv->vbt.sdvo_lvds_vbt_mode);
> if (newmode != NULL) {
> /* Guarantee the mode is preferred */
> newmode->type = (DRM_MODE_TYPE_PREFERRED |
> diff --git a/drivers/gpu/drm/i915/intel_tv.c b/drivers/gpu/drm/i915/intel_tv.c
> index b945bc5..7d11a5a 100644
> --- a/drivers/gpu/drm/i915/intel_tv.c
> +++ b/drivers/gpu/drm/i915/intel_tv.c
> @@ -1521,12 +1521,12 @@ static int tv_is_present_in_vbt(struct drm_device *dev)
> struct child_device_config *p_child;
> int i, ret;
>
> - if (!dev_priv->child_dev_num)
> + if (!dev_priv->vbt.child_dev_num)
> return 1;
>
> ret = 0;
> - for (i = 0; i < dev_priv->child_dev_num; i++) {
> - p_child = dev_priv->child_dev + i;
> + for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
> + p_child = dev_priv->vbt.child_dev + i;
> /*
> * If the device type is not TV, continue.
> */
> @@ -1564,7 +1564,7 @@ intel_tv_init(struct drm_device *dev)
> return;
> }
> /* Even if we have an encoder we may not have a connector */
> - if (!dev_priv->int_tv_support)
> + if (!dev_priv->vbt.int_tv_support)
> return;
>
> /*
> --
> 1.7.11.7
>
> _______________________________________________
> Intel-gfx mailing list
> Intel-gfx at lists.freedesktop.org
> http://lists.freedesktop.org/mailman/listinfo/intel-gfx
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
