Gmbus driver would setup all Intel i2c GMBuses. But DDC bus
may configured as gpio and reserved for MIPI driver to control
panel power on/off sequence.
Using i2c tool to communicate to peripherals via i2c interface
reversed for gmbus(DDC). There will be some high/low pulse
appear on DDC SCL and SDA (might be host sent out i2c slave
address). MIPI panel would be impacted due to unexpected signal
then caused abnormal display or shut down issue.
v2: gmbus driver should not add i2c adapter for DDC interface
if LFP display was configured to support MIPI panel.
Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
Cc: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
Cc: Cooper Chiou <cooper.chiou@xxxxxxxxx>
Cc: William Tseng <william.tseng@xxxxxxxxx>
Signed-off-by: Lee Shawn C <shawn.c.lee@xxxxxxxxx>
---
drivers/gpu/drm/i915/display/intel_gmbus.c | 19 +++++++++++++++++++
1 file changed, 19 insertions(+)
diff --git a/drivers/gpu/drm/i915/display/intel_gmbus.c b/drivers/gpu/drm/i915/display/intel_gmbus.c
index ceb1bf8a8c3c..8d2dcc4a6a53 100644
--- a/drivers/gpu/drm/i915/display/intel_gmbus.c
+++ b/drivers/gpu/drm/i915/display/intel_gmbus.c
@@ -141,6 +141,22 @@ bool intel_gmbus_is_valid_pin(struct drm_i915_private *dev_priv,
return pin < size && get_gmbus_pin(dev_priv, pin)->name;
}
+bool intel_gmbus_ddc_reserve_for_mipi(struct drm_i915_private *dev_priv,
+ unsigned int pin)
+{
+ enum port port;
+
+ if (intel_bios_is_dsi_present(dev_priv, &port)) {
+ if (DISPLAY_VER(dev_priv) >= 11) {
+ if ((pin == GMBUS_PIN_2_BXT && dev_priv->vbt.dsi.config->dual_link) ||
+ pin == GMBUS_PIN_1_BXT)
+ return true;
+ }
+ }
+
+ return false;
+}
+
/* Intel GPIO access functions */
#define I2C_RISEFALL_TIME 10
@@ -862,6 +878,9 @@ int intel_gmbus_setup(struct drm_i915_private *dev_priv)
if (!intel_gmbus_is_valid_pin(dev_priv, pin))
continue;
+ if (intel_gmbus_ddc_reserve_for_mipi(dev_priv, pin))
+ continue;
+
bus = &dev_priv->gmbus[pin];
bus->adapter.owner = THIS_MODULE;
--
2.17.1
