On HSW the CPU side eDP is always on port-A, the PCH side eDP is always on port-D. Signed-off-by: Imre Deak <imre.deak at intel.com> --- drivers/gpu/drm/i915/intel_display.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c index 0ed764d..5b689b2 100644 --- a/drivers/gpu/drm/i915/intel_display.c +++ b/drivers/gpu/drm/i915/intel_display.c @@ -5976,7 +5976,7 @@ static int haswell_crtc_mode_set(struct drm_crtc *crtc, for_each_encoder_on_crtc(dev, crtc, encoder) { switch (encoder->type) { case INTEL_OUTPUT_EDP: - if (!intel_encoder_is_pch_edp(&encoder->base)) + if (enc_to_dig_port(&encoder->base)->port == PORT_A) is_cpu_edp = true; break; } -- 1.7.10.4