✓ Fi.CI.BAT: success for drm/displayid: VESA vendor block and drm/i915 MSO use of it (rev2)

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Title: Project List - Patchwork
Patch Details
Series:drm/displayid: VESA vendor block and drm/i915 MSO use of it (rev2)
URL:https://patchwork.freedesktop.org/series/94161/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20930/index.html

CI Bug Log - changes from CI_DRM_10540 -> Patchwork_20930

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20930/index.html

Known issues

Here are the changes found in Patchwork_20930 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Participating hosts (43 -> 35)

Missing (8): fi-ilk-m540 bat-dg1-6 bat-dg1-5 fi-skl-guc fi-bsw-cyan fi-ctg-p8600 fi-bdw-samus bat-jsl-1

Build changes

CI-20190529: 20190529
CI_DRM_10540: 8eff208fe95db1015e8fe0e4026065e6f0fa7d30 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6193: 080869f804cb86b25a38889e5ce9a870571cd8c4 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20930: db849e26e74799e360e55ec39bc240e4f1b2d95c @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

db849e26e747 drm/i915/edp: use MSO pixel overlap from DisplayID data
fd20bedfadd9 drm/i915/edp: postpone MSO init until after EDID read
9570941e69a9 drm/edid: parse the DisplayID v2.0 VESA vendor block for MSO
c30e221ed86a drm/edid: abstract OUI conversion to 24-bit int
f4d0b48dd388 drm/displayid: add DisplayID v2.0 data blocks and primary use cases
c1b9800976a8 drm/displayid: re-align data block macros


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