Jesse Barnes <jbarnes at virtuousgeek.org> writes: > We can't read the pfit regs if the power well is off, so use the cached > value. > > v2: re-add lost comment (Jesse) > make sure the crtc using the fitter is actually enabled (Jesse) > > Signed-off-by: Jesse Barnes <jbarnes at virtuousgeek.org> > --- > drivers/gpu/drm/i915/intel_display.c | 2 +- > 1 file changed, 1 insertion(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/intel_display.c b/drivers/gpu/drm/i915/intel_display.c > index 6504337..6be34f2 100644 > --- a/drivers/gpu/drm/i915/intel_display.c > +++ b/drivers/gpu/drm/i915/intel_display.c > @@ -5918,7 +5918,7 @@ static void haswell_modeset_global_resources(struct drm_device *dev) > * sequence that's not yet available. Just in case desktop eDP > * on PORT D is possible on haswell, too. */ > /* Even the eDP panel fitter is outside the always-on well. */ > - if (I915_READ(PF_WIN_SZ(crtc->pipe))) > + if (crtc->config.pch_pfit.size && crtc->base.enabled) > enable = true; > } > Remove the now useless *dev_priv to remove compiler warning and then add Reviewed-by: Mika Kuoppala <mika.kuoppala at intel.com>
