On Tue, 2021-07-07, Lee Shawn C <shawn.c.lee@xxxxxxxxx> wrote: >On Tue, 2021-07-07, Almahallawy, Khaled <khaled.almahallawy@xxxxxxxxx> wrote: >>I believe Imre's LT fallback: >>https://github.com/ideak/linux/commits/linktraining-fallback-fix and Chrome user space fix: >>https://chromium-review.googlesource.com/c/chromium/src/+/3003487 >>should address Chrome concerns for LT failure and LTTPRs >> > >Thanks for comment! The new fallback patch should help on this DPRX problem. >One more thing. If driver did not handle DPRX link train failed properly. >It would impact link layer compliance test case in below. > >400.3.1.3 >400.3.1.4 >400.3.1.6 >400.3.1.12 >400.3.1.13 >400.3.1.14 > >Best regards, >Shawn > Hi all, before Imre's patch series land on upstream driver. The link train failed handling works for LTTPR only. But DPRX does not. Could you please consider to have this change as temporary solution? Thanks! Best regards, Shawn >>Thanks >>Khaled >> >>On Tue, 2021-07-06 at 23:25 +0800, Lee Shawn C wrote: >>> After DPRX link training, intel_dp_link_train_phy() did not return >>> the training result properly. If link training failed, >>> i915 driver would not run into link train fallback function. >>> And no hotplug uevent would be received by user space application. >>> >>> Fixes: b30edfd8d0b4 ("drm/i915: Switch to LTTPR non-transparent mode >>> link training") >>> Cc: Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> >>> Cc: Imre Deak <imre.deak@xxxxxxxxx> >>> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx> >>> Cc: Cooper Chiou <cooper.chiou@xxxxxxxxx> >>> Cc: William Tseng <william.tseng@xxxxxxxxx> >>> Signed-off-by: Lee Shawn C <shawn.c.lee@xxxxxxxxx> >>> --- >>> drivers/gpu/drm/i915/display/intel_dp_link_training.c | 2 +- >>> 1 file changed, 1 insertion(+), 1 deletion(-) >>> >>> diff --git a/drivers/gpu/drm/i915/display/intel_dp_link_training.c >>> b/drivers/gpu/drm/i915/display/intel_dp_link_training.c >>> index 08bceae40aa8..e44788b2c564 100644 >>> --- a/drivers/gpu/drm/i915/display/intel_dp_link_training.c >>> +++ b/drivers/gpu/drm/i915/display/intel_dp_link_training.c >>> @@ -849,7 +849,7 @@ intel_dp_link_train_all_phys(struct intel_dp >>> *intel_dp, >>> } >>> >>> if (ret) >>> - intel_dp_link_train_phy(intel_dp, crtc_state, >>> DP_PHY_DPRX); >>> + ret = intel_dp_link_train_phy(intel_dp, crtc_state, >>> DP_PHY_DPRX); >>> >>> if (intel_dp->set_idle_link_train) >>> intel_dp->set_idle_link_train(intel_dp, crtc_state); >> >_______________________________________________ >Intel-gfx mailing list >Intel-gfx@xxxxxxxxxxxxxxxxxxxxx >https://lists.freedesktop.org/mailman/listinfo/intel-gfx
