| Series: | drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabled |
| URL: | https://patchwork.freedesktop.org/series/93318/ |
| State: | success |
| Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/index.html |
CI Bug Log - changes from CI_DRM_10440 -> Patchwork_20762
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20762/index.html
Possible new issues
Here are the unknown changes that may have been introduced in Patchwork_20762:
IGT changes
Suppressed
The following results come from untrusted machines, tests, or statuses.
They do not affect the overall result.
- igt@i915_selftest@live@requests:
- {fi-tgl-dsi}: PASS -> DMESG-WARN
Known issues
Here are the changes found in Patchwork_20762 that come from known issues:
IGT changes
Issues hit
-
igt@gem_exec_parallel@engines@userptr:
- fi-pnv-d510: PASS -> INCOMPLETE (i915#299)
-
igt@gem_exec_suspend@basic-s0:
-
igt@runner@aborted:
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Participating hosts (37 -> 32)
Missing (5): fi-kbl-soraka fi-hsw-4200u fi-bsw-cyan bat-jsl-1 fi-bdw-samus
Build changes
- Linux: CI_DRM_10440 -> Patchwork_20762
CI-20190529: 20190529
CI_DRM_10440: 95b785be5ff0413ff419b30da574a7e3d353b33b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6159: 6135b9cc319ed965e3aafb5b2ae2abf4762a06b2 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20762: 31185812783debebc9c19772194bdd17d6bc0812 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
31185812783d drm/i915: Apply CMTG clock disabling WA while DPLL0 is enabled
