On 23/07/2021 17:43, Daniel Stone wrote:
Hi Tvrtko,
Thanks for typing this up!
On Thu, 15 Jul 2021 at 10:18, Tvrtko Ursulin
<tvrtko.ursulin@xxxxxxxxxxxxxxx> wrote:
+Mandatory fully standardised keys
+---------------------------------
+
+- drm-driver: <str>
+
+String shall contain a fixed string uniquely identified the driver handling
+the device in question. For example name of the respective kernel module.
I think let's be more prescriptive and just say that it is the module name.
I liked the drm_driver.name the other Daniel made so I'll go with that.
+Optional fully standardised keys
+--------------------------------
+
+- drm-pdev: <aaaa:bb.cc.d>
+
+For PCI devices this should contain the PCI slot address of the device in
+question.
How about just major:minor of the DRM render node device it's attached to?
I don't have a strong opinion on this one. I can add it, but might keep
the drm-dev tag under the optional list because it is handy for
intel_gpu_top multi-device support. Or maybe the lookup to pci device is
easier than I think now so okay, on my todo list to check.
+- drm-client-id: <uint>
+
+Unique value relating to the open DRM file descriptor used to distinguish
+duplicated and shared file descriptors. Conceptually the value should map 1:1
+to the in kernel representation of `struct drm_file` instances.
+
+Uniqueness of the value shall be either globally unique, or unique within the
+scope of each device, in which case `drm-pdev` shall be present as well.
+
+Userspace should make sure to not double account any usage statistics by using
+the above described criteria in order to associate data to individual clients.
+
+- drm-engine-<str>: <uint> ns
+
+GPUs usually contain multiple execution engines. Each shall be given a stable
+and unique name (str), with possible values documented in the driver specific
+documentation.
+
+Value shall be in specified time units which the respective GPU engine spent
+busy executing workloads belonging to this client.
+
+Values are not required to be constantly monotonic if it makes the driver
+implementation easier, but are required to catch up with the previously reported
+larger value within a reasonable period. Upon observing a value lower than what
+was previously read, userspace is expected to stay with that larger previous
+value until a monotonic update is seen.
Yeah, that would work well for Mali/Panfrost. We can queue multiple
jobs in the hardware, which can either be striped across multiple
cores with an affinity mask (e.g. 3 cores for your client and 1 for
your compositor), or picked according to priority, or ...
The fine-grained performance counters (e.g. time spent waiting for
sampler) are only GPU-global. So if you have two jobs running
simultaneously, you have no idea who's responsible for what.
But it does give us coarse-grained counters which are accounted
per-job-slot, including exactly this metric: amount of 'GPU time'
(whatever that means) occupied by that job slot during the sampling
period. So we could support that nicely if we fenced job-slot updates
with register reads/writes.
Something I'm missing though is how we enable this information. Seems
like it would be best to either only do it whilst fdinfo is open (and
re-read it whenever you need an update), or on a per-driver sysfs
toggle, or ... ?
Presumably there is non-trivial cost for querying this data on your driver?
Would it be workable to enable tracking on first use and stop some time
after last? Just a thought which may have significant downsides from
driver to driver.
+- drm-memory-<str>: <uint> [KiB|MiB]
+
+Each possible memory type which can be used to store buffer objects by the
+GPU in question shall be given a stable and unique name to be returned as the
+string here.
+
+Value shall reflect the amount of storage currently consumed by the buffer
+object belong to this client, in the respective memory region.
+
+Default unit shall be bytes with optional unit specifiers of 'KiB' or 'MiB'
+indicating kibi- or mebi-bytes.
I'm a bit wary of the accounting here. Is it buffer allocations
originating from the client, in which case it conceptually clashes
with gralloc? Is it the client which last wrote to the buffer? The
client with the oldest open handle to the buffer? Other?
Haven't looked into AMD code here so know what they export.
Gralloc allocates buffer from it's own drm client and shares them or it
is just a library which runs from a client context?
Regards,
Tvrtko
_______________________________________________
Intel-gfx mailing list
Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
https://lists.freedesktop.org/mailman/listinfo/intel-gfx