On Thu, Jul 22, 2021 at 12:20:41PM -0700, José Roberto de Souza wrote:
> Workaround also needed for alderlake-P.
>
> HSDES: 14010801662
> Cc: Matt Roper <matthew.d.roper@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
Marked incorrectly in the workaround database, but based on the notes
there, it is indeed needed for ADL-P too.
Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 247f0331ebee3..b84d1d816898f 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -1583,8 +1583,8 @@ rcs_engine_wa_init(struct intel_engine_cs *engine, struct i915_wa_list *wal)
> }
>
> if (IS_DG1(i915) || IS_ROCKETLAKE(i915) || IS_TIGERLAKE(i915) ||
> - IS_ALDERLAKE_S(i915)) {
> - /* Wa_1406941453:tgl,rkl,dg1,adl-s */
> + IS_ALDERLAKE_S(i915) || IS_ALDERLAKE_P(i915)) {
> + /* Wa_1406941453:tgl,rkl,dg1,adl-s,adl-p */
> wa_masked_en(wal,
> GEN10_SAMPLER_MODE,
> ENABLE_SMALLPL);
> --
> 2.32.0
>
--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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