On Tue, 2021-07-13 at 20:15 -0700, Matt Roper wrote: > Since we can't steer multicast register reads during ring-based > workaround verification, we need to define the multicast ranges where > failure to steer could potentially cause us to read back from a > fused-off register instance. > > As with gen12, we can ignore the multicast ranges that the bspec > describes as 'SQIDI' since all instances of those registers will always > be present and we'll always be able to read back a workaround value that > was written with multicast. > Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > Bspec: 66534 > Cc: José Roberto de Souza <jose.souza@xxxxxxxxx> > Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 +++++++++++++++++++- > 1 file changed, 19 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c > index 72562c233ad2..3abe424ef9c9 100644 > --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c > +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c > @@ -2097,12 +2097,30 @@ static const struct mcr_range mcr_ranges_gen12[] = { > {}, > }; > > +static const struct mcr_range mcr_ranges_xehp[] = { > + { .start = 0x4000, .end = 0x4aff }, > + { .start = 0x5200, .end = 0x52ff }, > + { .start = 0x5400, .end = 0x7fff }, > + { .start = 0x8140, .end = 0x815f }, > + { .start = 0x8c80, .end = 0x8dff }, > + { .start = 0x94d0, .end = 0x955f }, > + { .start = 0x9680, .end = 0x96ff }, > + { .start = 0xb000, .end = 0xb3ff }, > + { .start = 0xc800, .end = 0xcfff }, > + { .start = 0xd800, .end = 0xd8ff }, > + { .start = 0xdc00, .end = 0xffff }, > + { .start = 0x17000, .end = 0x17fff }, > + { .start = 0x24a00, .end = 0x24a7f }, > +}; > + > static bool mcr_range(struct drm_i915_private *i915, u32 offset) > { > const struct mcr_range *mcr_ranges; > int i; > > - if (GRAPHICS_VER(i915) >= 12) > + if (GRAPHICS_VER_FULL(i915) >= IP_VER(12, 50)) > + mcr_ranges = mcr_ranges_xehp; > + else if (GRAPHICS_VER(i915) >= 12) > mcr_ranges = mcr_ranges_gen12; > else if (GRAPHICS_VER(i915) >= 8) > mcr_ranges = mcr_ranges_gen8; _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx