On Fri, 2021-07-16 at 22:14 -0700, Matt Roper wrote:
> On SKL we've been applying this workaround on H0+ steppings, which is
> actually backwards; H0 is supposed to be the first stepping where the
> workaround is no longer needed. Flip the bounds so that the workaround
> applies to all steppings _before_ H0.
>
> On BXT we've been applying this workaround to all steppings, but the
> bspec tells us it's only needed until C0. Pre-C0 GT steppings only
> appeared in pre-production hardware, which we no longer support in the
> driver, so we can drop the workaround completely for this platform.
>
> On ICL we've been applying this workaround to all steppings, but there
> doesn't seem to be any indication that this workaround was ever needed
> for this platform (even now-deprecated page 20196 of the bspec doesn't
> mention it). We can go ahead and drop it.
>
> I also don't see any mention of this workaround being needed for KBL,
> although this may be an oversight since the workaround is needed for all
> steppings of CFL. I'll leave the workaround in place for KBL to be
> safe.
Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
>
> Bspec: 14091, 33450
> Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/gt/intel_workarounds.c | 20 ++------------------
> 1 file changed, 2 insertions(+), 18 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> index 7731db33c46a..76a3b5d5e9dc 100644
> --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c
> +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c
> @@ -838,23 +838,12 @@ skl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> GEN8_EU_GAUNIT_CLOCK_GATE_DISABLE);
>
> /* WaInPlaceDecompressionHang:skl */
> - if (IS_SKL_GT_STEP(i915, STEP_H0, STEP_FOREVER))
> + if (IS_SKL_GT_STEP(i915, STEP_A0, STEP_H0 - 1))
> wa_write_or(wal,
> GEN9_GAMT_ECO_REG_RW_IA,
> GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
> }
>
> -static void
> -bxt_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> -{
> - gen9_gt_workarounds_init(i915, wal);
> -
> - /* WaInPlaceDecompressionHang:bxt */
> - wa_write_or(wal,
> - GEN9_GAMT_ECO_REG_RW_IA,
> - GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
> -}
> -
> static void
> kbl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> {
> @@ -942,11 +931,6 @@ icl_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal)
> {
> icl_wa_init_mcr(i915, wal);
>
> - /* WaInPlaceDecompressionHang:icl */
> - wa_write_or(wal,
> - GEN9_GAMT_ECO_REG_RW_IA,
> - GAMT_ECO_ENABLE_IN_PLACE_DECOMPRESS);
> -
> /* WaModifyGamTlbPartitioning:icl */
> wa_write_clr_set(wal,
> GEN11_GACB_PERF_CTRL,
> @@ -1081,7 +1065,7 @@ gt_init_workarounds(struct drm_i915_private *i915, struct i915_wa_list *wal)
> else if (IS_KABYLAKE(i915))
> kbl_gt_workarounds_init(i915, wal);
> else if (IS_BROXTON(i915))
> - bxt_gt_workarounds_init(i915, wal);
> + gen9_gt_workarounds_init(i915, wal);
> else if (IS_SKYLAKE(i915))
> skl_gt_workarounds_init(i915, wal);
> else if (IS_HASWELL(i915))
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