On Thu, Jul 08, 2021 at 02:18:27PM -0700, José Roberto de Souza wrote:
> This workaround is also applicable to xelpd display so extending it.
>
> Cc: Gwan-gyeong Mun <gwan-gyeong.mun@xxxxxxxxx>
> Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
Reviewed-by: Matt Roper <matthew.d.roper@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display_power.c | 4 ++--
> 1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_power.c b/drivers/gpu/drm/i915/display/intel_display_power.c
> index 6fc766da66054..d92db471411e5 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_power.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_power.c
> @@ -5883,8 +5883,8 @@ static void icl_display_core_init(struct drm_i915_private *dev_priv,
> if (resume && intel_dmc_has_payload(dev_priv))
> intel_dmc_load_program(dev_priv);
>
> - /* Wa_14011508470 */
> - if (DISPLAY_VER(dev_priv) == 12) {
> + /* Wa_14011508470:tgl,dg1,rkl,adl-s,adl-p */
> + if (DISPLAY_VER(dev_priv) >= 12) {
> val = DCPR_CLEAR_MEMSTAT_DIS | DCPR_SEND_RESP_IMM |
> DCPR_MASK_LPMODE | DCPR_MASK_MAXLATENCY_MEMUP_CLR;
> intel_uncore_rmw(&dev_priv->uncore, GEN11_CHICKEN_DCPR_2, 0, val);
> --
> 2.32.0
>
> _______________________________________________
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> Intel-gfx@xxxxxxxxxxxxxxxxxxxxx
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--
Matt Roper
Graphics Software Engineer
VTT-OSGC Platform Enablement
Intel Corporation
(916) 356-2795
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