On Tue, Apr 23, 2013 at 5:02 PM, Ville Syrj?l? <ville.syrjala at linux.intel.com> wrote: > On Fri, Apr 19, 2013 at 11:24:33AM +0200, Daniel Vetter wrote: >> We need to multiply the hdmi port dotclock by 1.5x since it's not >> really a dotclock, but the 10/8 encoding bitclock divided by 10. >> >> Also add correct limit checks for the dotclock and reject modes which >> don't fit. HDMI 1.4 would allow more, but our hw doesn't support that >> unfortunately :( >> >> Somehow I suspect 12bpc hdmi output never really worked - we really >> need an i-g-t testcase to check all the different pixel modes and >> outputs. >> >> v2: Fixup the adjusted port clock handling - we need to make sure that >> the fdi link code still gets the real pixelclock. >> >> v3: g4x/vlv don't support 12bpc hdmi output so drop the bogus comment. >> >> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch> > > Seems to match what the spec says. Although I'm getting confused about > all the clocks we have. Somehow I'd prefer to store the pixel clock in > the mode, and move the link clock out, but perhaps that makes things > more messy elsewhere... Yeah, I think we need to switch over to storing the adjusted pixel clok in adjuste_mode->clock and keep the link clock in a separate field in the pipe config. The current code is just a mess. I haven't done this yet since I need some more clarity first, so that we don't horribly break eDP ... > Also I'm confused about the 225 MHz limit. That seems to be specific to > PCH platforms. My g4x docs say that HDMI limit is 165 MHz. Also > intel_limits_g4x_hdmi() has dot.max of 400 MHz which seems to contradict > the docs (400 MHz is correct for the DAC apparently). But then again the > docs also say that the p1_slow/p2_fast switchover point is 165 MHz, so > if the max is 165 MHz too, there would never be any need to use p2_fast > with HDMI. The more I read the docs, the more confused I get. Yeah, it's a complete disaster. My thinking with the 225 MHz clock is that: - 12 bpc is a hdmi-only feature, so we can forget about any fancy DVI cases - hdmi spec up to 1.2 says 225MHz is the upper limit of the 8/10 symbol clock. So I've figured by limiting things to the 1.2 hdmi spec I could avoid trying to untangle this mess and trying to reconcile our code with Bspec. I'm cheap, I know ... -Daniel -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
