Hi all, This fixes all the bugs I've found in my various systems when using non-24bpp modes as the first part of the series. And with working non-standard bpp support I've figured we can go fancy and implemented auto-dithering if we hit an fdi bw limit. Which means that you can now use 3-pipe pch configurations on ivb on pretty much everywhere. The only restriction is that you need to fire up pipe C first, since without atomic modeset pipe B will otherwise too much bw. One big thing here is that this will break Paulo's hsw eDP machine, specifically the patch called "drm/i915: force bpp for eDP panels". But apparently without that my machine here is broken ... Ideas highly welcome about how we could quirk ourselves out of this mess. Cheers, Daniel Daniel Vetter (15): drm/i915: fixup 12bpc hdmi dotclock handling drm/i915: Disable high-bpc on pre-1.4 EDID screens drm/i915: force bpp for eDP panels drm/i915: drop adjusted_mode from *_set_pipeconf functions drm/i915: implement high-bpc + pipeconf-dither support for g4x/vlv drm/i915: allow high-bpc modes on DP drm/i915: Fixup non-24bpp support for VGA screens on Haswell drm/i915: move intel_crtc->fdi_lanes to pipe_config drm/i915: hw state readout support for pipe_config->fdi_lanes drm/i915: split up fdi_set_m_n into computation and hw setup drm/i915: compute fdi lane config earlier drm/i915: Split up ironlake_check_fdi_lanes drm/i915: move fdi lane configuration checks ahead drm/i915: don't count cpu ports for fdi B/C lane sharing drm/i915: implement fdi auto-dithering drivers/gpu/drm/i915/intel_crt.c | 4 + drivers/gpu/drm/i915/intel_ddi.c | 7 +- drivers/gpu/drm/i915/intel_display.c | 349 ++++++++++++++++++++++------------- drivers/gpu/drm/i915/intel_dp.c | 12 +- drivers/gpu/drm/i915/intel_drv.h | 12 +- drivers/gpu/drm/i915/intel_hdmi.c | 31 +++- drivers/gpu/drm/i915/intel_lvds.c | 4 +- 7 files changed, 275 insertions(+), 144 deletions(-) -- 1.7.11.7
