Series: | drm/i915/display/dg1: Correctly map DPLLs during state readout |
URL: | https://patchwork.freedesktop.org/series/92086/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20499/index.html |
CI Bug Log - changes from CI_DRM_10295 -> Patchwork_20499
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20499/index.html
Known issues
Here are the changes found in Patchwork_20499 that come from known issues:
IGT changes
Issues hit
-
igt@gem_exec_suspend@basic-s0:
- fi-cfl-8109u: PASS -> INCOMPLETE (i915#155)
-
igt@kms_chamelium@dp-crc-fast:
Participating hosts (39 -> 35)
Missing (4): fi-kbl-soraka fi-ilk-m540 fi-bsw-cyan fi-bdw-samus
Build changes
- Linux: CI_DRM_10295 -> Patchwork_20499
CI-20190529: 20190529
CI_DRM_10295: 683b7f160eb6993ccfc19e67e3c7111f12946bea @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6124: 357d5477c93f2bdd3354afe91b89ccfd4ee4fd56 @ https://gitlab.freedesktop.org/drm/igt-gpu-tools.git
Patchwork_20499: 5fce8912a42d082b6732b961c94fa6197d36b977 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
5fce8912a42d drm/i915/display/dg1: Correctly map DPLLs during state readout
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