On Fri, Apr 19, 2013 at 12:23:02PM +0300, ville.syrjala at linux.intel.com wrote: > From: Ville Syrj?l? <ville.syrjala at linux.intel.com> > > Shame on me for not putting the bit definitions next to the register > definition in the first place. > > Signed-off-by: Ville Syrj?l? <ville.syrjala at linux.intel.com> Queued for -next, thanks for the patch. -Daniel > --- > drivers/gpu/drm/i915/i915_reg.h | 7 +++---- > 1 file changed, 3 insertions(+), 4 deletions(-) > > diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h > index fb1a4fa..5a33a37 100644 > --- a/drivers/gpu/drm/i915/i915_reg.h > +++ b/drivers/gpu/drm/i915/i915_reg.h > @@ -4928,6 +4928,9 @@ > #define _PIPE_A_CSC_COEFF_RV_GV 0x49020 > #define _PIPE_A_CSC_COEFF_BV 0x49024 > #define _PIPE_A_CSC_MODE 0x49028 > +#define CSC_BLACK_SCREEN_OFFSET (1 << 2) > +#define CSC_POSITION_BEFORE_GAMMA (1 << 1) > +#define CSC_MODE_YUV_TO_RGB (1 << 0) > #define _PIPE_A_CSC_PREOFF_HI 0x49030 > #define _PIPE_A_CSC_PREOFF_ME 0x49034 > #define _PIPE_A_CSC_PREOFF_LO 0x49038 > @@ -4949,10 +4952,6 @@ > #define _PIPE_B_CSC_POSTOFF_ME 0x49144 > #define _PIPE_B_CSC_POSTOFF_LO 0x49148 > > -#define CSC_BLACK_SCREEN_OFFSET (1 << 2) > -#define CSC_POSITION_BEFORE_GAMMA (1 << 1) > -#define CSC_MODE_YUV_TO_RGB (1 << 0) > - > #define PIPE_CSC_COEFF_RY_GY(pipe) _PIPE(pipe, _PIPE_A_CSC_COEFF_RY_GY, _PIPE_B_CSC_COEFF_RY_GY) > #define PIPE_CSC_COEFF_BY(pipe) _PIPE(pipe, _PIPE_A_CSC_COEFF_BY, _PIPE_B_CSC_COEFF_BY) > #define PIPE_CSC_COEFF_RU_GU(pipe) _PIPE(pipe, _PIPE_A_CSC_COEFF_RU_GU, _PIPE_B_CSC_COEFF_RU_GU) > -- > 1.8.1.5 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx at lists.freedesktop.org > http://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Daniel Vetter Software Engineer, Intel Corporation +41 (0) 79 365 57 48 - http://blog.ffwll.ch
