On Thu, 27 May 2021, Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx> wrote: > We currently treat same slice mask as a same DBuf state and skip > updating the Dbuf slices, if we detect that. > This is wrong as if we have a multi to single pipe change or > vice versa, that would be treated as a same Dbuf state and thus > no changes required, so we don't get Mbus updated, causing issues. > Solution: check also mbus_join, in addition to slices mask. > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Signed-off-by: Stanislav Lisovskiy <stanislav.lisovskiy@xxxxxxxxx> > --- > drivers/gpu/drm/i915/intel_pm.c | 6 ++++-- > 1 file changed, 4 insertions(+), 2 deletions(-) > > diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c > index 00f3dead20ad..804d83486e81 100644 > --- a/drivers/gpu/drm/i915/intel_pm.c > +++ b/drivers/gpu/drm/i915/intel_pm.c > @@ -8093,7 +8093,8 @@ void intel_dbuf_pre_plane_update(struct intel_atomic_state *state) > intel_atomic_get_old_dbuf_state(state); > > if (!new_dbuf_state || > - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) > + ((new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) > + && (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus))) > return; > > WARN_ON(!new_dbuf_state->base.changed); > @@ -8113,7 +8114,8 @@ void intel_dbuf_post_plane_update(struct intel_atomic_state *state) > intel_atomic_get_old_dbuf_state(state); > > if (!new_dbuf_state || > - new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) > + ((new_dbuf_state->enabled_slices == old_dbuf_state->enabled_slices) > + && (new_dbuf_state->joined_mbus == old_dbuf_state->joined_mbus))) > return; I've pushed this to din because supposedly this is urgent. However, the && is supposed to be at the end of the previous line, and there was a checkpatch email reply about this. Also, there are excessive parenthesis here. Please fix this. BR, Jani. > > WARN_ON(!new_dbuf_state->base.changed); -- Jani Nikula, Intel Open Source Graphics Center _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx