On Wed, May 19, 2021 at 07:48:21PM +0530, Tejas Upadhyay wrote:
> When pipe A is disabled and MIPI DSI is enabled on pipe B,
> the AMT KVMR feature will incorrectly see pipe A as enabled.
> Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
> it set while DSI is enabled on pipe B. No impact to setting it
> all the time.
>
> Changes since V2:
> - Used REG_BIT, ignored pipe A and used sw state check - Jani
> - Made function wrapper - Jani
> Changes since V1:
> - ./dim checkpatch errors addressed
>
> Signed-off-by: Tejas Upadhyay <tejaskumarx.surendrakumar.upadhyay@xxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/icl_dsi.c | 21 +++++++++++++++++++++
> drivers/gpu/drm/i915/i915_reg.h | 1 +
> 2 files changed, 22 insertions(+)
>
> diff --git a/drivers/gpu/drm/i915/display/icl_dsi.c b/drivers/gpu/drm/i915/display/icl_dsi.c
> index ce544e20f35c..799cacf4cf6e 100644
> --- a/drivers/gpu/drm/i915/display/icl_dsi.c
> +++ b/drivers/gpu/drm/i915/display/icl_dsi.c
> @@ -1236,15 +1236,34 @@ static void gen11_dsi_pre_enable(struct intel_atomic_state *state,
> gen11_dsi_set_transcoder_timings(encoder, pipe_config);
> }
>
> +/*
> + * WA 1409054076:JSL,EHL
It's also needed on ICL.
> + * When pipe A is disabled and MIPI DSI is enabled on pipe B,
> + * the AMT KVMR feature will incorrectly see pipe A as enabled.
> + * Set 0x42080 bit 23=1 before enabling DSI on pipe B and leave
> + * it set while DSI is enabled on pipe B
> + */
> +static void wa_1409054076(struct intel_encoder *encoder,
The name should be more readable something like
icl_apply_kvmr_pipe_a_wa().
> + enum pipe pipe, bool enable)
> +{
> + struct drm_i915_private *dev_priv = to_i915(encoder->base.dev);
> +
> + if (IS_JSL_EHL(dev_priv) && pipe == PIPE_B)
Based on the above the platform check should be DISPLAY_VER == 11.
> + intel_de_rmw(dev_priv, CHICKEN_PAR1_1,
> + enable ? 0 : IGNORE_KVMR_PIPE_A,
No need to make the clear (ie mask) param conditional.
> + enable ? IGNORE_KVMR_PIPE_A : 0);
> +}
> static void gen11_dsi_enable(struct intel_atomic_state *state,
> struct intel_encoder *encoder,
> const struct intel_crtc_state *crtc_state,
> const struct drm_connector_state *conn_state)
> {
> struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> + struct intel_crtc *crtc = to_intel_crtc(conn_state->crtc);
>
> drm_WARN_ON(state->base.dev, crtc_state->has_pch_encoder);
>
> + wa_1409054076(encoder, crtc->pipe, true);
> /* step6d: enable dsi transcoder */
> gen11_dsi_enable_transcoder(encoder);
>
> @@ -1398,7 +1417,9 @@ static void gen11_dsi_disable(struct intel_atomic_state *state,
> const struct drm_connector_state *old_conn_state)
> {
> struct intel_dsi *intel_dsi = enc_to_intel_dsi(encoder);
> + struct intel_crtc *crtc = to_intel_crtc(old_conn_state->crtc);
>
> + wa_1409054076(encoder, crtc->pipe, false);
The flag should be cleared after disabling the pipe ie after
gen11_dsi_disable_transcoder().
Would be good to print a debug message during driver loading/resume if
BIOS hasn't set the WA correctly on a DSI output enabled on pipe B
already.
> /* step1: turn off backlight */
> intel_dsi_vbt_exec_sequence(intel_dsi, MIPI_SEQ_BACKLIGHT_OFF);
> intel_panel_disable_backlight(old_conn_state);
> diff --git a/drivers/gpu/drm/i915/i915_reg.h b/drivers/gpu/drm/i915/i915_reg.h
> index 089b5a59bed3..fe01c6e05a45 100644
> --- a/drivers/gpu/drm/i915/i915_reg.h
> +++ b/drivers/gpu/drm/i915/i915_reg.h
> @@ -8041,6 +8041,7 @@ enum {
> # define CHICKEN3_DGMG_DONE_FIX_DISABLE (1 << 2)
>
> #define CHICKEN_PAR1_1 _MMIO(0x42080)
> +#define IGNORE_KVMR_PIPE_A REG_BIT(23)
> #define KBL_ARB_FILL_SPARE_22 REG_BIT(22)
> #define DIS_RAM_BYPASS_PSR2_MAN_TRACK (1 << 16)
> #define SKL_DE_COMPRESSED_HASH_MODE (1 << 15)
> --
> 2.31.1
>
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