On gen9 for blt cmd parser we relied on the magic fence error
propagation which:
- doesn't work on gen7, because there's no scheduler with ringbuffers
there yet
- fence error propagation can be weaponized to attack other things, so
not a good design idea
Instead of magic, do the same thing on gen9 as on gen7.
Kudos to Jason for figuring this out.
Fixes: 9e31c1fe45d5 ("drm/i915: Propagate errors on awaiting already signaled fences")
Cc: <stable@xxxxxxxxxxxxxxx> # v5.6+
Cc: Jason Ekstrand <jason.ekstrand@xxxxxxxxx>
Cc: Marcin Slusarz <marcin.slusarz@xxxxxxxxx>
Cc: Jon Bloomfield <jon.bloomfield@xxxxxxxxx>
Relates: https://gitlab.freedesktop.org/drm/intel/-/issues/3080
Signed-off-by: Daniel Vetter <daniel.vetter@xxxxxxxxx>
---
drivers/gpu/drm/i915/i915_cmd_parser.c | 34 +++++++++++++-------------
1 file changed, 17 insertions(+), 17 deletions(-)
diff --git a/drivers/gpu/drm/i915/i915_cmd_parser.c b/drivers/gpu/drm/i915/i915_cmd_parser.c
index 5b4b2bd46e7c..2d3336ab7ba3 100644
--- a/drivers/gpu/drm/i915/i915_cmd_parser.c
+++ b/drivers/gpu/drm/i915/i915_cmd_parser.c
@@ -1509,6 +1509,12 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine,
}
}
+ /* Batch unsafe to execute with privileges, cancel! */
+ if (ret) {
+ cmd = page_mask_bits(shadow->obj->mm.mapping);
+ *cmd = MI_BATCH_BUFFER_END;
+ }
+
if (trampoline) {
/*
* With the trampoline, the shadow is executed twice.
@@ -1524,26 +1530,20 @@ int intel_engine_cmd_parser(struct intel_engine_cs *engine,
*/
*batch_end = MI_BATCH_BUFFER_END;
- if (ret) {
- /* Batch unsafe to execute with privileges, cancel! */
- cmd = page_mask_bits(shadow->obj->mm.mapping);
- *cmd = MI_BATCH_BUFFER_END;
+ /* If batch is unsafe but valid, jump to the original */
+ if (ret == -EACCES) {
+ unsigned int flags;
- /* If batch is unsafe but valid, jump to the original */
- if (ret == -EACCES) {
- unsigned int flags;
+ flags = MI_BATCH_NON_SECURE_I965;
+ if (IS_HASWELL(engine->i915))
+ flags = MI_BATCH_NON_SECURE_HSW;
- flags = MI_BATCH_NON_SECURE_I965;
- if (IS_HASWELL(engine->i915))
- flags = MI_BATCH_NON_SECURE_HSW;
+ GEM_BUG_ON(!IS_GEN_RANGE(engine->i915, 6, 7));
+ __gen6_emit_bb_start(batch_end,
+ batch_addr,
+ flags);
- GEM_BUG_ON(!IS_GEN_RANGE(engine->i915, 6, 7));
- __gen6_emit_bb_start(batch_end,
- batch_addr,
- flags);
-
- ret = 0; /* allow execution */
- }
+ ret = 0; /* allow execution */
}
}
--
2.31.0
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