✗ Fi.CI.BAT: failure for Alder Lake-P Support (rev3)

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Title: Project List - Patchwork
Patch Details
Series:Alder Lake-P Support (rev3)
URL:https://patchwork.freedesktop.org/series/89899/
State:failure
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20133/index.html

CI Bug Log - changes from CI_DRM_10086 -> Patchwork_20133

Summary

FAILURE

Serious unknown changes coming with Patchwork_20133 absolutely need to be
verified manually.

If you think the reported changes have nothing to do with the changes
introduced in Patchwork_20133, please notify your bug team to allow them
to document this new failure mode, which will reduce false positives in CI.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20133/index.html

Possible new issues

Here are the unknown changes that may have been introduced in Patchwork_20133:

IGT changes

Possible regressions

Known issues

Here are the changes found in Patchwork_20133 that come from known issues:

IGT changes

Issues hit

Possible fixes

Warnings

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Participating hosts (32 -> 31)

Additional (1): fi-bsw-n3050
Missing (2): fi-rkl-11500t fi-bdw-samus

Build changes

CI-20190529: 20190529
CI_DRM_10086: a73c87ed6301c646ae2958b305c2b000104636e7 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_6084: 5c5734d8ee1afac871b69c4554ff14e9b56100e4 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_20133: ca9ff5dd218c9c70b24a0d237e009ddf645a7a38 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

ca9ff5dd218c drm/i915/adl_p: Update memory bandwidth parameters
da50af1ce2e4 drm/i915/adlp: Add PIPE_MISC2 programming
2dd4e736791e drm/i915/adl_p: Program DP/HDMI link rate to DDI_BUF_CTL
782c3c115c01 drm/i915/adl_p: Add PLL Support
8fa95e0f0503 drm/i915/adl_p: Define and use ADL-P specific DP translation tables
5cf544ca43f8 drm/i915/display: Introduce new intel_psr_pause/resume function
4b21bdb8b22f drm/i915/display: Add PSR interrupt error check function
faf766443c65 drm/i915/display: Remove a redundant function argument from intel_psr_enable_source()
2fb9ed851bb9 drm/i915/display: Replace dc3co_enabled with dc3co_exitline on intel_psr struct
74e6c6938518 drm/i915/adl_p: Tx escape clock with DSI
9c7584fd868b drm/i915/adl_p: MBUS programming
06e65debe409 drm/i915: Introduce MBUS relative dbuf offsets
ca87410c9f8e drm/i915/adl_p: Add ddb allocation support
0f8f45b4eab0 drm/i915/adl_p: Don't config MBUS and DBUF during display initialization
59056339187a drm/i915/adl_p: Implement TC sequences
9091d510c87e drm/i915/adl_p: Handle TC cold
ab38e9a19e25 drm/i915/adl_p: Setup ports/phys
aec612c383d6 drm/i915/adl_p: Add dedicated SAGV watermarks
86b0a49caa0c drm/i915/xelpd: Add VRR guardband for VRR CTL
09597ccfe6b7 drm/i915/xelpd: Add rc_qp_table for rcparams calculation
b87e6b06fa3d drm/i915/xelpd: Calculate VDSC RC parameters
0018489cbe17 drm/i915/xelpd: Support DP1.4 compression BPPs
1f1476bbdc3a drm/i915/xelpd: Enhanced pipe underrun reporting

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