On Tue, May 4, 2021 at 3:47 AM Daniel Vetter <daniel@xxxxxxxx> wrote: > > On Mon, May 03, 2021 at 10:57:23AM -0500, Jason Ekstrand wrote: > > Previously, we were storing the ring size in the ring pointer before it > > was actually allocated. We would then guard setting the ring size on > > checking for CONTEXT_ALLOC_BIT. This is error-prone at best and really > > only saves us a few bytes on something that already burns at least 4K. > > Instead, this patch adds a new ring_size field and makes everything use > > that. > > > > Signed-off-by: Jason Ekstrand <jason@xxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/gem/i915_gem_context.c | 3 +-- > > drivers/gpu/drm/i915/gt/intel_context.c | 3 ++- > > drivers/gpu/drm/i915/gt/intel_context.h | 5 ----- > > drivers/gpu/drm/i915/gt/intel_context_types.h | 1 + > > drivers/gpu/drm/i915/gt/intel_lrc.c | 2 +- > > drivers/gpu/drm/i915/gt/selftest_execlists.c | 2 +- > > drivers/gpu/drm/i915/gt/selftest_mocs.c | 2 +- > > drivers/gpu/drm/i915/gt/selftest_timeline.c | 2 +- > > drivers/gpu/drm/i915/gvt/scheduler.c | 7 ++----- > > 9 files changed, 10 insertions(+), 17 deletions(-) > > > > diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c > > index e52b85b8f923d..2ba4c7e4011b4 100644 > > --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c > > +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c > > @@ -211,8 +211,7 @@ static void intel_context_set_gem(struct intel_context *ce, > > GEM_BUG_ON(rcu_access_pointer(ce->gem_context)); > > RCU_INIT_POINTER(ce->gem_context, ctx); > > > > - if (!test_bit(CONTEXT_ALLOC_BIT, &ce->flags)) > > - ce->ring = __intel_context_ring_size(SZ_16K); > > + ce->ring_size = SZ_16K; > > > > if (rcu_access_pointer(ctx->vm)) { > > struct i915_address_space *vm; > > diff --git a/drivers/gpu/drm/i915/gt/intel_context.c b/drivers/gpu/drm/i915/gt/intel_context.c > > index 17cf2640b082b..342fa7daa08b5 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_context.c > > +++ b/drivers/gpu/drm/i915/gt/intel_context.c > > @@ -372,7 +372,8 @@ intel_context_init(struct intel_context *ce, struct intel_engine_cs *engine) > > ce->engine = engine; > > ce->ops = engine->cops; > > ce->sseu = engine->sseu; > > - ce->ring = __intel_context_ring_size(SZ_4K); > > + ce->ring = NULL; > > + ce->ring_size = SZ_4K; > > > > ewma_runtime_init(&ce->runtime.avg); > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_context.h b/drivers/gpu/drm/i915/gt/intel_context.h > > index f83a73a2b39fc..b10cbe8fee992 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_context.h > > +++ b/drivers/gpu/drm/i915/gt/intel_context.h > > @@ -175,11 +175,6 @@ int intel_context_prepare_remote_request(struct intel_context *ce, > > > > struct i915_request *intel_context_create_request(struct intel_context *ce); > > > > -static inline struct intel_ring *__intel_context_ring_size(u64 sz) > > -{ > > - return u64_to_ptr(struct intel_ring, sz); > > -} > > - > > static inline bool intel_context_is_barrier(const struct intel_context *ce) > > { > > return test_bit(CONTEXT_BARRIER_BIT, &ce->flags); > > diff --git a/drivers/gpu/drm/i915/gt/intel_context_types.h b/drivers/gpu/drm/i915/gt/intel_context_types.h > > index ed8c447a7346b..90026c1771055 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_context_types.h > > +++ b/drivers/gpu/drm/i915/gt/intel_context_types.h > > @@ -82,6 +82,7 @@ struct intel_context { > > spinlock_t signal_lock; /* protects signals, the list of requests */ > > > > struct i915_vma *state; > > + u32 ring_size; > > struct intel_ring *ring; > > struct intel_timeline *timeline; > > > > diff --git a/drivers/gpu/drm/i915/gt/intel_lrc.c b/drivers/gpu/drm/i915/gt/intel_lrc.c > > index e86897cde9846..63193c80fb117 100644 > > --- a/drivers/gpu/drm/i915/gt/intel_lrc.c > > +++ b/drivers/gpu/drm/i915/gt/intel_lrc.c > > @@ -845,7 +845,7 @@ int lrc_alloc(struct intel_context *ce, struct intel_engine_cs *engine) > > if (IS_ERR(vma)) > > return PTR_ERR(vma); > > > > - ring = intel_engine_create_ring(engine, (unsigned long)ce->ring); > > + ring = intel_engine_create_ring(engine, ce->ring_size); > > if (IS_ERR(ring)) { > > err = PTR_ERR(ring); > > goto err_vma; > > diff --git a/drivers/gpu/drm/i915/gt/selftest_execlists.c b/drivers/gpu/drm/i915/gt/selftest_execlists.c > > index 1081cd36a2bd3..01d9896dd4844 100644 > > --- a/drivers/gpu/drm/i915/gt/selftest_execlists.c > > +++ b/drivers/gpu/drm/i915/gt/selftest_execlists.c > > @@ -2793,7 +2793,7 @@ static int __live_preempt_ring(struct intel_engine_cs *engine, > > goto err_ce; > > } > > > > - tmp->ring = __intel_context_ring_size(ring_sz); > > + tmp->ring_size = ring_sz; > > > > err = intel_context_pin(tmp); > > if (err) { > > diff --git a/drivers/gpu/drm/i915/gt/selftest_mocs.c b/drivers/gpu/drm/i915/gt/selftest_mocs.c > > index e55a887d11e2b..f343fa5fd986f 100644 > > --- a/drivers/gpu/drm/i915/gt/selftest_mocs.c > > +++ b/drivers/gpu/drm/i915/gt/selftest_mocs.c > > @@ -28,7 +28,7 @@ static struct intel_context *mocs_context_create(struct intel_engine_cs *engine) > > return ce; > > > > /* We build large requests to read the registers from the ring */ > > - ce->ring = __intel_context_ring_size(SZ_16K); > > + ce->ring_size = SZ_16K; > > > > return ce; > > } > > diff --git a/drivers/gpu/drm/i915/gt/selftest_timeline.c b/drivers/gpu/drm/i915/gt/selftest_timeline.c > > index 9adbd9d147bea..7eedecfb86e59 100644 > > --- a/drivers/gpu/drm/i915/gt/selftest_timeline.c > > +++ b/drivers/gpu/drm/i915/gt/selftest_timeline.c > > @@ -874,7 +874,7 @@ static int create_watcher(struct hwsp_watcher *w, > > if (IS_ERR(ce)) > > return PTR_ERR(ce); > > > > - ce->ring = __intel_context_ring_size(ringsz); > > + ce->ring_size = ringsz; > > w->rq = intel_context_create_request(ce); > > intel_context_put(ce); > > if (IS_ERR(w->rq)) > > diff --git a/drivers/gpu/drm/i915/gvt/scheduler.c b/drivers/gpu/drm/i915/gvt/scheduler.c > > index fc735692f21fb..99bc9fed6fbb6 100644 > > --- a/drivers/gpu/drm/i915/gvt/scheduler.c > > +++ b/drivers/gpu/drm/i915/gvt/scheduler.c > > @@ -1409,11 +1409,8 @@ int intel_vgpu_setup_submission(struct intel_vgpu *vgpu) > > intel_context_set_single_submission(ce); > > > > /* Max ring buffer size */ > > - if (!intel_uc_wants_guc_submission(&engine->gt->uc)) { > > - const unsigned int ring_size = 512 * SZ_4K; > > - > > - ce->ring = __intel_context_ring_size(ring_size); > > - } > > + if (!intel_uc_wants_guc_submission(&engine->gt->uc)) > > + ce->ring_size = 512 * SZ_4K; > > A rather funny way of saying SZ_2M. Maybe fix that if you feel like. W/ or > w/o that: Done. > Reviewed-by: Daniel Vetter <daniel.vetter@xxxxxxxx> > > > > > s->shadow[i] = ce; > > } > > -- > > 2.31.1 > > > > _______________________________________________ > > dri-devel mailing list > > dri-devel@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/dri-devel > > -- > Daniel Vetter > Software Engineer, Intel Corporation > http://blog.ffwll.ch _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx