== Series Details == Series: Another batch of reviewed XeLPD / ADL-P patches URL : https://patchwork.freedesktop.org/series/90169/ State : warning == Summary == $ dim checkpatch origin/drm-tip dc16ea52587b drm/i915/xelpd: Handle new location of outputs D and E 314d49aa2d02 drm/i915/xelpd: Increase maximum watermark lines to 255 bcc1af51c6e6 drm/i915/display/dsc: Refactor intel_dp_dsc_compute_bpp 1d494651f544 drm/i915/xelpd: Support DP1.4 compression BPPs -:41: CHECK:LINE_SPACING: Please don't use multiple blank lines #41: FILE: drivers/gpu/drm/i915/display/intel_dp.c:524: + total: 0 errors, 0 warnings, 1 checks, 75 lines checked 376ad1f5149e drm/i915: Get slice height before computing rc params 964d5a8d3a60 drm/i915/xelpd: Provide port/phy mapping for vbt 7286424486be drm/i915/adl_p: Extend PLANE_WM bits for blocks & lines 406c1002291e drm/i915/adl_p: Add cdclk support for ADL-P d07a1c416e0f drm/i915/display/tc: Rename safe_mode functions ownership 0d2dc8550001 drm/i915/adl_p: Enable modular fia afe8c4d0449e drm/i915: Move intel_modeset_all_pipes() bb2924fe8a7d drm/i915/adl_p: Enable/disable loadgen sharing -:27: CHECK:PARENTHESIS_ALIGNMENT: Alignment should match open parenthesis #27: FILE: drivers/gpu/drm/i915/display/intel_ddi.c:1464: + if ((intel_crtc_has_dp_encoder(crtc_state) && + crtc_state->port_clock == 162000) || total: 0 errors, 0 warnings, 1 checks, 21 lines checked f5c0cc6e05ae drm/i915/bigjoiner: Mode validation with uncompressed pipe joiner 801654db5b66 drm/i915/bigjoiner: Avoid dsc_compute_config for uncompressed bigjoiner c0ab3dda42fe drm/i915/bigjoiner: atomic commit changes for uncompressed joiner 05f26cdcc673 drm/i915/adl_p: Add IPs stepping mapping -:25: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #25: FILE: drivers/gpu/drm/i915/i915_drv.h:1554: +#define IS_ADLP_DISPLAY_STEP(__i915, since, until) \ + (IS_ALDERLAKE_P(__i915) && \ + IS_DISPLAY_STEP(__i915, since, until)) -:29: CHECK:MACRO_ARG_REUSE: Macro argument reuse '__i915' - possible side-effects? #29: FILE: drivers/gpu/drm/i915/i915_drv.h:1558: +#define IS_ADLP_GT_STEP(__i915, since, until) \ + (IS_ALDERLAKE_P(__i915) && \ + IS_GT_STEP(__i915, since, until)) total: 0 errors, 0 warnings, 2 checks, 38 lines checked 1929a3b973d9 drm/i915/adl_p: Implement Wa_22011091694 909eca03ec38 drm/i915/display/adl_p: Implement Wa_22011320316 d66be9f4eff1 drm/i915/adl_p: Disable CCS on a-step (Wa_22011186057) _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
