> -----Original Message----- > From: Intel-gfx <intel-gfx-bounces@xxxxxxxxxxxxxxxxxxxxx> On Behalf Of Matt > Roper > Sent: Friday, May 7, 2021 7:28 PM > To: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Nikula, Jani <jani.nikula@xxxxxxxxx> > Subject: [PATCH v3 44/48] drm/i915/adl_p: Add IPs stepping > mapping > > From: José Roberto de Souza <jose.souza@xxxxxxxxx> > > This will allow us to better implement workarounds. > > Cc: Matt Roper <matthew.d.roper@xxxxxxxxx> > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > Signed-off-by: Matt Roper <matthew.d.roper@xxxxxxxxx> Reviewed-by: Anusha Srivatsa <anusha.srivatsa@xxxxxxxxx> > --- > drivers/gpu/drm/i915/i915_drv.h | 8 ++++++++ > drivers/gpu/drm/i915/intel_step.c | 12 +++++++++++- > 2 files changed, 19 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/i915_drv.h > b/drivers/gpu/drm/i915/i915_drv.h index 3fe514c5de32..b556eccc9ad2 > 100644 > --- a/drivers/gpu/drm/i915/i915_drv.h > +++ b/drivers/gpu/drm/i915/i915_drv.h > @@ -1556,6 +1556,14 @@ IS_SUBPLATFORM(const struct drm_i915_private > *i915, > (IS_ALDERLAKE_S(__i915) && \ > IS_GT_STEP(__i915, since, until)) > > +#define IS_ADLP_DISPLAY_STEP(__i915, since, until) \ > + (IS_ALDERLAKE_P(__i915) && \ > + IS_DISPLAY_STEP(__i915, since, until)) > + > +#define IS_ADLP_GT_STEP(__i915, since, until) \ > + (IS_ALDERLAKE_P(__i915) && \ > + IS_GT_STEP(__i915, since, until)) > + > #define IS_LP(dev_priv) (INTEL_INFO(dev_priv)->is_lp) > #define IS_GEN9_LP(dev_priv) (IS_GEN(dev_priv, 9) && IS_LP(dev_priv)) > #define IS_GEN9_BC(dev_priv) (IS_GEN(dev_priv, 9) && !IS_LP(dev_priv)) > diff --git a/drivers/gpu/drm/i915/intel_step.c > b/drivers/gpu/drm/i915/intel_step.c > index 4d71547a5b83..ba9479a67521 100644 > --- a/drivers/gpu/drm/i915/intel_step.c > +++ b/drivers/gpu/drm/i915/intel_step.c > @@ -47,6 +47,13 @@ static const struct intel_step_info > adls_revid_step_tbl[] = { > [0xC] = { .gt_step = STEP_D0, .display_step = STEP_C0 }, }; > > +static const struct intel_step_info adlp_revid_step_tbl[] = { > + [0x0] = { .gt_step = STEP_A0, .display_step = STEP_A0 }, > + [0x4] = { .gt_step = STEP_B0, .display_step = STEP_B0 }, > + [0x8] = { .gt_step = STEP_C0, .display_step = STEP_C0 }, > + [0xC] = { .gt_step = STEP_C0, .display_step = STEP_D0 }, }; > + > void intel_step_init(struct drm_i915_private *i915) { > const struct intel_step_info *revids = NULL; @@ -54,7 +61,10 @@ > void intel_step_init(struct drm_i915_private *i915) > int revid = INTEL_REVID(i915); > struct intel_step_info step = {}; > > - if (IS_ALDERLAKE_S(i915)) { > + if (IS_ALDERLAKE_P(i915)) { > + revids = adlp_revid_step_tbl; > + size = ARRAY_SIZE(adlp_revid_step_tbl); > + } else if (IS_ALDERLAKE_S(i915)) { > revids = adls_revid_step_tbl; > size = ARRAY_SIZE(adls_revid_step_tbl); > } else if (IS_TGL_U(i915) || IS_TGL_Y(i915)) { > -- > 2.25.4 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx