On Wed, 14 Apr 2021, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> Now that each pipe tracks its own no_fbc_reason we can print that
> out in debugfs, and we can also show which pipe is currently
> selected for FBC duty.
>
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> .../drm/i915/display/intel_display_debugfs.c | 50 +++++++++++++------
> 1 file changed, 36 insertions(+), 14 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display_debugfs.c b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> index 183c414d554a..26317e66cb95 100644
> --- a/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> +++ b/drivers/gpu/drm/i915/display/intel_display_debugfs.c
> @@ -38,15 +38,36 @@ static int i915_frontbuffer_tracking(struct seq_file *m, void *unused)
> return 0;
> }
>
> +static bool i915_fbc_is_compressing(struct drm_i915_private *dev_priv)
> +{
> + if (!intel_fbc_is_active(dev_priv))
> + return false;
> +
> + if (DISPLAY_VER(dev_priv) >= 8)
> + return intel_de_read(dev_priv, IVB_FBC_STATUS2) & BDW_FBC_COMP_SEG_MASK;
> + else if (DISPLAY_VER(dev_priv) >= 7)
> + return intel_de_read(dev_priv, IVB_FBC_STATUS2) & IVB_FBC_COMP_SEG_MASK;
> + else if (DISPLAY_VER(dev_priv) >= 5)
> + return intel_de_read(dev_priv, ILK_DPFC_STATUS) & ILK_DPFC_COMP_SEG_MASK;
> + else if (IS_G4X(dev_priv))
> + return intel_de_read(dev_priv, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
> + else
> + return intel_de_read(dev_priv, FBC_STATUS) &
> + (FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
> +}
I wouldn't mind moving debugfs helpers like this to files by feature,
e.g. intel_fbc.[ch] in this case. This one could just return bool like
here; in some cases I'm starting to think passing struct seq_file * and
having the helper print there would make sense.
BR,
Jani.
> +
> static int i915_fbc_status(struct seq_file *m, void *unused)
> {
> struct drm_i915_private *dev_priv = node_to_i915(m->private);
> struct intel_fbc *fbc = &dev_priv->fbc;
> + struct intel_crtc *crtc;
> intel_wakeref_t wakeref;
>
> if (!HAS_FBC(dev_priv))
> return -ENODEV;
>
> + drm_modeset_lock_all(&dev_priv->drm);
> +
> wakeref = intel_runtime_pm_get(&dev_priv->runtime_pm);
> mutex_lock(&fbc->lock);
>
> @@ -55,27 +76,28 @@ static int i915_fbc_status(struct seq_file *m, void *unused)
> else
> seq_printf(m, "FBC disabled: %s\n", fbc->no_fbc_reason);
>
> - if (intel_fbc_is_active(dev_priv)) {
> - u32 mask;
> + seq_printf(m, "Compressing: %s\n", yesno(i915_fbc_is_compressing(dev_priv)));
>
> - if (DISPLAY_VER(dev_priv) >= 8)
> - mask = intel_de_read(dev_priv, IVB_FBC_STATUS2) & BDW_FBC_COMP_SEG_MASK;
> - else if (DISPLAY_VER(dev_priv) >= 7)
> - mask = intel_de_read(dev_priv, IVB_FBC_STATUS2) & IVB_FBC_COMP_SEG_MASK;
> - else if (DISPLAY_VER(dev_priv) >= 5)
> - mask = intel_de_read(dev_priv, ILK_DPFC_STATUS) & ILK_DPFC_COMP_SEG_MASK;
> - else if (IS_G4X(dev_priv))
> - mask = intel_de_read(dev_priv, DPFC_STATUS) & DPFC_COMP_SEG_MASK;
> - else
> - mask = intel_de_read(dev_priv, FBC_STATUS) &
> - (FBC_STAT_COMPRESSING | FBC_STAT_COMPRESSED);
> + for_each_intel_crtc(&dev_priv->drm, crtc) {
> + struct intel_plane *plane = to_intel_plane(crtc->base.primary);
> + const struct intel_crtc_state *crtc_state =
> + to_intel_crtc_state(crtc->base.state);
>
> - seq_printf(m, "Compressing: %s\n", yesno(mask));
> + if (!plane->has_fbc)
> + continue;
> +
> + seq_printf(m, "%c [CRTC:%d:%s]/[PLANE:%d:%s]: %s\n",
> + fbc->crtc == crtc ? '*' : ' ',
> + crtc->base.base.id, crtc->base.name,
> + plane->base.base.id, plane->base.name,
> + crtc_state->no_fbc_reason ?: "FBC possible");
> }
>
> mutex_unlock(&fbc->lock);
> intel_runtime_pm_put(&dev_priv->runtime_pm, wakeref);
>
> + drm_modeset_unlock_all(&dev_priv->drm);
> +
> return 0;
> }
--
Jani Nikula, Intel Open Source Graphics Center
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