On Wed, Apr 14, 2021 at 06:09:23PM +0300, Jani Nikula wrote:
> On Wed, 14 Apr 2021, Ville Syrjala <ville.syrjala@xxxxxxxxxxxxxxx> wrote:
> > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> >
> > Write the tiling check in a nicer form.
> >
> > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> > ---
> > drivers/gpu/drm/i915/display/intel_fbc.c | 6 ++----
> > 1 file changed, 2 insertions(+), 4 deletions(-)
> >
> > diff --git a/drivers/gpu/drm/i915/display/intel_fbc.c b/drivers/gpu/drm/i915/display/intel_fbc.c
> > index 04d9c7d22b04..178243a6d3a2 100644
> > --- a/drivers/gpu/drm/i915/display/intel_fbc.c
> > +++ b/drivers/gpu/drm/i915/display/intel_fbc.c
> > @@ -681,11 +681,9 @@ static bool tiling_is_valid(struct drm_i915_private *dev_priv,
> > {
> > switch (modifier) {
> > case DRM_FORMAT_MOD_LINEAR:
> > - if (DISPLAY_VER(dev_priv) >= 9)
> > - return true;
> > - return false;
> > - case I915_FORMAT_MOD_X_TILED:
> > case I915_FORMAT_MOD_Y_TILED:
> > + return DISPLAY_VER(dev_priv) >= 9;
>
> So this adds the version check on I915_FORMAT_MOD_Y_TILED which didn't
> have it before?
Yeah, but Y tile scanout is gen9+ anyway. Should have pointed
that out in the commit msg I suppose.
--
Ville Syrjälä
Intel
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