On Wed, Apr 03, 2013 at 11:03:02PM +0200, Daniel Vetter wrote:
> This has been lost in my recent bpp handling rework in
>
> commit 4e53c2e010e531b4a014692199e978482d471c7e
> Author: Daniel Vetter <daniel.vetter at ffwll.ch>
> Date: Wed Mar 27 00:44:58 2013 +0100
>
> drm/i915: precompute pipe bpp before touching the hw
>
> Cc: Paulo Zanoni <przanoni at gmail.com>
> Signed-off-by: Daniel Vetter <daniel.vetter at ffwll.ch>
I think we can disregard this patch since my next pipe-config series will
touch this some more and add a real debug output again. I'll (re) submit
that pile tomorrow.
-Daniel
> ---
> drivers/gpu/drm/i915/intel_dp.c | 5 ++++-
> 1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/intel_dp.c b/drivers/gpu/drm/i915/intel_dp.c
> index c5cfec3..58ba0a0 100644
> --- a/drivers/gpu/drm/i915/intel_dp.c
> +++ b/drivers/gpu/drm/i915/intel_dp.c
> @@ -741,8 +741,11 @@ intel_dp_compute_config(struct intel_encoder *encoder,
> /* Walk through all bpp values. Luckily they're all nicely spaced with 2
> * bpc in between. */
> bpp = min_t(int, 8*3, pipe_config->pipe_bpp);
> - if (is_edp(intel_dp) && dev_priv->edp.bpp)
> + if (is_edp(intel_dp) && dev_priv->edp.bpp) {
> + DRM_DEBUG_KMS("clamping display bpc (was %d) to eDP (%d)\n",
> + bpp, dev_priv->edp.bpp);
> bpp = min_t(int, bpp, dev_priv->edp.bpp);
> + }
>
> for (; bpp >= 6*3; bpp -= 2*3) {
> mode_rate = intel_dp_link_required(target_clock, bpp);
> --
> 1.7.10.4
>
--
Daniel Vetter
Software Engineer, Intel Corporation
+41 (0) 79 365 57 48 - http://blog.ffwll.ch
