On Sun, Mar 28, 2021 at 03:56:58PM -0700, Daniele Ceraolo Spurio wrote: > The setting is required by hardware to allow us doing further protection > operation such as sending commands to GPU or TEE. The register needs to > be re-programmed on resume, so for simplicitly we bundle the programming > with the component binding, which is automatically called on resume. > > Further HW set-up operations will be added in the same location in > follow-up patches, so get ready for them by using a couple of > init/fini_hw wrappers instead of calling the KCR funcs directly. > > v3: move programming to component binding function, rework commit msg > > Signed-off-by: Huang, Sean Z <sean.z.huang@xxxxxxxxx> > Signed-off-by: Daniele Ceraolo Spurio <daniele.ceraolospurio@xxxxxxxxx> > --- > drivers/gpu/drm/i915/pxp/intel_pxp.c | 27 ++++++++++++++++++++++++ > drivers/gpu/drm/i915/pxp/intel_pxp.h | 3 +++ > drivers/gpu/drm/i915/pxp/intel_pxp_tee.c | 5 +++++ > 3 files changed, 35 insertions(+) > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c > index a0fc43f72cad..c1ad0cf2c664 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c > @@ -7,6 +7,24 @@ > #include "gt/intel_context.h" > #include "i915_drv.h" > > +/* KCR register definitions */ > +#define KCR_INIT _MMIO(0x320f0) > + > +/* Setting KCR Init bit is required after system boot */ > +#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES REG_BIT(14) defining registers outside of i915_reg.h is so wrong imo... but I'm afraid I have lost this fight :/ > + > +static void kcr_pxp_enable(struct intel_gt *gt) > +{ > + intel_uncore_write(gt->uncore, KCR_INIT, > + _MASKED_BIT_ENABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES)); > +} > + > +static void kcr_pxp_disable(struct intel_gt *gt) > +{ > + intel_uncore_write(gt->uncore, KCR_INIT, > + _MASKED_BIT_DISABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES)); > +} > + > static int create_vcs_context(struct intel_pxp *pxp) > { > static struct lock_class_key pxp_lock; > @@ -71,5 +89,14 @@ void intel_pxp_fini(struct intel_pxp *pxp) > intel_pxp_tee_component_fini(pxp); > > destroy_vcs_context(pxp); > +} > + > +void intel_pxp_init_hw(struct intel_pxp *pxp) > +{ > + kcr_pxp_enable(pxp_to_gt(pxp)); > +} > > +void intel_pxp_fini_hw(struct intel_pxp *pxp) > +{ > + kcr_pxp_disable(pxp_to_gt(pxp)); > } > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.h b/drivers/gpu/drm/i915/pxp/intel_pxp.h > index e87550fb9821..5427c3b28aa9 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.h > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.h > @@ -22,6 +22,9 @@ static inline bool intel_pxp_is_enabled(const struct intel_pxp *pxp) > #ifdef CONFIG_DRM_I915_PXP > void intel_pxp_init(struct intel_pxp *pxp); > void intel_pxp_fini(struct intel_pxp *pxp); > + > +void intel_pxp_init_hw(struct intel_pxp *pxp); > +void intel_pxp_fini_hw(struct intel_pxp *pxp); > #else > static inline void intel_pxp_init(struct intel_pxp *pxp) > { > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > index 21916ec0f6ff..33130fb7113b 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp_tee.c > @@ -33,6 +33,9 @@ static int i915_pxp_tee_component_bind(struct device *i915_kdev, > pxp->pxp_component = data; > pxp->pxp_component->tee_dev = tee_kdev; > > + /* the component is required to fully start the PXP HW */ > + intel_pxp_init_hw(pxp); > + > return 0; > } > > @@ -41,6 +44,8 @@ static void i915_pxp_tee_component_unbind(struct device *i915_kdev, > { > struct intel_pxp *pxp = i915_dev_to_pxp(i915_kdev); > > + intel_pxp_fini_hw(pxp); > + Reviewed-by: Rodrigo Vivi <rodrigo.vivi@xxxxxxxxx> > pxp->pxp_component = NULL; > } > > -- > 2.29.2 > > _______________________________________________ > Intel-gfx mailing list > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx