From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> The SAGV watermark handling is still a bit of mess. Let's try to clean it up a bit more, and in the process fix up a couple of minor mishaps. Ville Syrjälä (6): drm/i915: Fix enabled_planes bitmask drm/i915: Tighten SAGV constraint for pre-tgl drm/i915: Check SAGV wm min_ddb_alloc rather than plane_res_b drm/i915: Calculate min_ddb_alloc for trans_wm drm/i915: Extract skl_check_wm_level() and skl_check_nv12_wm_level() drm/i915: s/plane_res_b/blocks/ etc. .../gpu/drm/i915/display/intel_atomic_plane.c | 5 +- drivers/gpu/drm/i915/display/intel_display.c | 24 +- .../drm/i915/display/intel_display_types.h | 6 +- drivers/gpu/drm/i915/intel_pm.c | 272 ++++++++++-------- 4 files changed, 165 insertions(+), 142 deletions(-) -- 2.26.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
