Quoting Piorkowski, Piotr (2021-02-24 15:29:25) > From: Piotr Piórkowski <piotr.piorkowski@xxxxxxxxx> > > Until now, the gen8_ggtt_pte_encode function, responsible for the preparation > of GGTT PTE, has not verified in any way whether the address given as the > parameter is correct. > By adding a GGTT address mask, we can easily verify that dma_addr will not fit > in the PTE field. > While around, cleanup a place where we hold all GEN12 GGTT PTE masks, > and the addition of the PTE description. > > Bspec: 45015 > > Signed-off-by: Piotr Piórkowski <piotr.piorkowski@xxxxxxxxx> > Cc: Matthew Auld <matthew.auld@xxxxxxxxx> > Cc: Michal Wajdeczko <michal.wajdeczko@xxxxxxxxx> > Cc: Michal Winiarski <michal.winiarski@xxxxxxxxx> > --- > drivers/gpu/drm/i915/gt/intel_ggtt.c | 2 ++ > drivers/gpu/drm/i915/gt/intel_gtt.h | 13 ++++++++++++- > 2 files changed, 14 insertions(+), 1 deletion(-) > > diff --git a/drivers/gpu/drm/i915/gt/intel_ggtt.c b/drivers/gpu/drm/i915/gt/intel_ggtt.c > index b0b8ded834f0..52b2428da431 100644 > --- a/drivers/gpu/drm/i915/gt/intel_ggtt.c > +++ b/drivers/gpu/drm/i915/gt/intel_ggtt.c > @@ -193,6 +193,8 @@ static u64 gen8_ggtt_pte_encode(dma_addr_t addr, > { > gen8_pte_t pte = addr | _PAGE_PRESENT; > > + GEM_BUG_ON(addr & ~GEN12_GGTT_PTE_ADDR_MASK); You can also check the dma_get_mask() doesn't exceed the addr mask. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx