Since we're about to convert everything in drm_dp_helper.c over to using drm_dbg_*(), let's also make our logging more consistent in drm_dp_helper.c while we're at it to ensure that we always print the name of the AUX channel in question. Signed-off-by: Lyude Paul <lyude@xxxxxxxxxx> --- drivers/gpu/drm/drm_dp_helper.c | 13 +++++++------ 1 file changed, 7 insertions(+), 6 deletions(-) diff --git a/drivers/gpu/drm/drm_dp_helper.c b/drivers/gpu/drm/drm_dp_helper.c index a9316c1ecb52..b5e2671baf22 100644 --- a/drivers/gpu/drm/drm_dp_helper.c +++ b/drivers/gpu/drm/drm_dp_helper.c @@ -139,8 +139,8 @@ void drm_dp_link_train_clock_recovery_delay(const struct drm_dp_aux *aux, DP_TRAINING_AUX_RD_MASK; if (rd_interval > 4) - DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n", - rd_interval); + DRM_DEBUG_KMS("%s: AUX interval %lu, out of range (max 4)\n", + aux->name, rd_interval); if (rd_interval == 0 || dpcd[DP_DPCD_REV] >= DP_DPCD_REV_14) rd_interval = 100; @@ -155,8 +155,8 @@ static void __drm_dp_link_train_channel_eq_delay(const struct drm_dp_aux *aux, unsigned long rd_interval) { if (rd_interval > 4) - DRM_DEBUG_KMS("AUX interval %lu, out of range (max 4)\n", - rd_interval); + DRM_DEBUG_KMS("%s: AUX interval %lu, out of range (max 4)\n", + aux->name, rd_interval); if (rd_interval == 0) rd_interval = 400; @@ -2769,7 +2769,7 @@ int drm_dp_pcon_frl_enable(struct drm_dp_aux *aux) if (ret < 0) return ret; if (!(buf & DP_PCON_ENABLE_SOURCE_CTL_MODE)) { - DRM_DEBUG_KMS("PCON in Autonomous mode, can't enable FRL\n"); + DRM_DEBUG_KMS("%s: PCON in Autonomous mode, can't enable FRL\n", aux->name); return -EINVAL; } buf |= DP_PCON_ENABLE_HDMI_LINK; @@ -2864,7 +2864,8 @@ void drm_dp_pcon_hdmi_frl_link_error_count(struct drm_dp_aux *aux, num_error = 0; } - DRM_ERROR("More than %d errors since the last read for lane %d", num_error, i); + DRM_ERROR("%s: More than %d errors since the last read for lane %d", + aux->name, num_error, i); } } EXPORT_SYMBOL(drm_dp_pcon_hdmi_frl_link_error_count); -- 2.29.2 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx