On Fri, Feb 19, 2021 at 08:16:25PM +0000, Souza, Jose wrote: > On Fri, 2021-02-19 at 21:46 +0200, Ville Syrjälä wrote: > > On Fri, Feb 19, 2021 at 11:16:23AM -0800, José Roberto de Souza wrote: > > > Without this readout all plane watermarks will be kept at zero in the > > > initial state readount causing two problems. > > > > > > All active planes will always have their watermarks programmed > > > again, even if what firmware programmed matches with the sanitized > > > state during driver takeover. > > > > > > State mismatch errors in disabled planes as watermarks will erroneous > > > match with the calculated state if firmware left watermark registers > > > with non-zero values. > > > > > > Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > Signed-off-by: José Roberto de Souza <jose.souza@xxxxxxxxx> > > > --- > > > drivers/gpu/drm/i915/display/intel_display.c | 2 ++ > > > 1 file changed, 2 insertions(+) > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c > > > index d0da88751c72..14fba4411be7 100644 > > > --- a/drivers/gpu/drm/i915/display/intel_display.c > > > +++ b/drivers/gpu/drm/i915/display/intel_display.c > > > @@ -13620,6 +13620,8 @@ static void intel_modeset_readout_hw_state(struct drm_device *dev) > > > drm_calc_timestamping_constants(&slave->base, > > > &slave_crtc_state->hw.adjusted_mode); > > > } > > > + > > > + skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); > > > > Strange. skl_wm_get_hw_state() should be doing this already. > > It is only doing some ddb readouts noting related to plane watermarks, maybe call skl_pipe_wm_get_hw_state() from there would be better? The call is definitely there in my copy of the code: skl_wm_get_hw_state(struct drm_i915_private *dev_priv) { struct intel_dbuf_state *dbuf_state = to_intel_dbuf_state(dev_priv->dbuf.obj.state); struct intel_crtc *crtc; for_each_intel_crtc(&dev_priv->drm, crtc) { struct intel_crtc_state *crtc_state = to_intel_crtc_state(crtc->base.state); enum pipe pipe = crtc->pipe; enum plane_id plane_id; skl_pipe_wm_get_hw_state(crtc, &crtc_state->wm.skl.optimal); ... -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx