Quoting Mika Kuoppala (2021-02-10 10:50:18) > Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> writes: > > > The surface_state_base is an offset into the batch, so we need to pass > > the correct batch address for STATE_BASE_ADDRESS. > > > > Fixes: 47f8253d2b89 ("drm/i915/gen7: Clear all EU/L3 residual contexts") > > Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > > Cc: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> > > Cc: Prathap Kumar Valsan <prathap.kumar.valsan@xxxxxxxxx> > > Cc: Akeem G Abodunrin <akeem.g.abodunrin@xxxxxxxxx> > > Reviewed-by: Mika Kuoppala <mika.kuoppala@xxxxxxxxxxxxxxx> Compared against https://intel-gfx-ci.01.org/tree/drm-tip/Trybot_7571/index.html I think we've found our suspect. -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx