> -----Original Message----- > From: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> > Sent: Friday, January 15, 2021 6:51 PM > To: S, Saichandana <saichandana.s@xxxxxxxxx>; intel- > gfx@xxxxxxxxxxxxxxxxxxxxx > Cc: Nikula, Jani <jani.nikula@xxxxxxxxx>; S, Saichandana > <saichandana.s@xxxxxxxxx> > Subject: Re: [PATCH v4] drm/i915/debugfs : PM_REQ and > PM_RES registers > > Quoting Saichandana S (2021-01-15 13:01:10) > > +static int i915_pm_req_res_info(struct seq_file *m, void *unused) { > > + struct drm_i915_private *i915 = node_to_i915(m->private); > > + struct intel_csr *csr = &i915->csr; > > + u32 DC9_status; > > + > > + if (!HAS_CSR(i915)) > > + return -ENODEV; > > + if (!csr->dmc_payload) > > + return 0; > > + DC9_status = intel_de_read(i915, PM_RSP_DBG_1) & > > + PM_RESP_DC9_READY; > > A read without waking the device up? Wait until IGT sees this. > [wrap with with_intel_runtime_pm(&i915->runtime_pm, wakeref)] -Chris > >Using wakeref, doesn't allow i915 to go to suspend state, further blocking display DC9 entry. Thus wakeref IGT test will fail. >[S, Saichandana] _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx