> -----Original Message----- > From: Imre Deak <imre.deak@xxxxxxxxx> > Sent: Friday, February 5, 2021 5:35 PM > To: Gupta, Anshuman <anshuman.gupta@xxxxxxxxx> > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > Subject: Re: [PATCH] drm/i915/debugfs: HDCP capability enc NULL > check > > On Fri, Feb 05, 2021 at 10:16:30AM +0200, Gupta, Anshuman wrote: > > > -----Original Message----- > > > From: Imre Deak <imre.deak@xxxxxxxxx> > > > Sent: Thursday, February 4, 2021 11:58 PM > > > To: Gupta, Anshuman <anshuman.gupta@xxxxxxxxx> > > > Cc: intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > Subject: Re: [PATCH] drm/i915/debugfs: HDCP capability > > > enc NULL check > > > > > > On Fri, Jan 29, 2021 at 01:30:43PM +0530, Anshuman Gupta wrote: > > > > DP-MST connector encoder initializes at modeset Adding a > > > > connector->encoder NULL check in order to avoid any NULL pointer > > > > dereference. > > > > intel_hdcp_enable() already handle this but debugfs can also > > > > invoke the intel_{hdcp,hdcp2_capable}. > > > > Handling it gracefully. > > > > > > > > Signed-off-by: Anshuman Gupta <anshuman.gupta@xxxxxxxxx> > > > > --- > > > > drivers/gpu/drm/i915/display/intel_hdcp.c | 14 ++++++++++++-- > > > > 1 file changed, 12 insertions(+), 2 deletions(-) > > > > > > > > diff --git a/drivers/gpu/drm/i915/display/intel_hdcp.c > > > > b/drivers/gpu/drm/i915/display/intel_hdcp.c > > > > index ae1371c36a32..58af323d189a 100644 > > > > --- a/drivers/gpu/drm/i915/display/intel_hdcp.c > > > > +++ b/drivers/gpu/drm/i915/display/intel_hdcp.c > > > > @@ -135,11 +135,16 @@ int intel_hdcp_read_valid_bksv(struct > > > > intel_digital_port *dig_port, > > > > /* Is HDCP1.4 capable on Platform and Sink */ bool > > > > intel_hdcp_capable(struct intel_connector *connector) { > > > > - struct intel_digital_port *dig_port = > > > intel_attached_dig_port(connector); > > > > + struct intel_digital_port *dig_port; > > > > const struct intel_hdcp_shim *shim = connector->hdcp.shim; > > > > bool capable = false; > > > > u8 bksv[5]; > > > > > > > > + if (!connector->encoder) > > > > + return -ENODEV; > > > > > > I assume this is needed when called from i915_hdcp_sink_capability > > > debugfs entry. That one is lacking the locking for the connector, > > > but is that entry really needed? We print the same info already from > > > the i915_display_info entry which has the proper locking and encoder > > > check. > > > > Historically HDCP capability added to i915_display_info later to debug > > CI machine as i915_display_info available as CI logs. Now the plans > > i915_display_info should only show the monitor capability. and > > i915_hdcp_sink_capability will check both sink and platform > > capability. > > Ok, in any case the encoder NULL check and the required locking should be done > in i915_hdcp_sink_capability_show(). Thanks Imre for review I will send a v2 patch. Thanks, Anshuman Gupta. > > > > > Thanks, > > Anshuman Gupta. > > > > > > > + > > > > + dig_port = intel_attached_dig_port(connector); > > > > + > > > > if (!shim) > > > > return capable; > > > > > > > > @@ -156,11 +161,16 @@ bool intel_hdcp_capable(struct > > > > intel_connector > > > > *connector) > > > > /* Is HDCP2.2 capable on Platform and Sink */ bool > > > > intel_hdcp2_capable(struct intel_connector *connector) { > > > > - struct intel_digital_port *dig_port = > > > intel_attached_dig_port(connector); > > > > + struct intel_digital_port *dig_port; > > > > struct drm_i915_private *dev_priv = to_i915(connector->base.dev); > > > > struct intel_hdcp *hdcp = &connector->hdcp; > > > > bool capable = false; > > > > > > > > + if (!connector->encoder) > > > > + return -ENODEV; > > > > + > > > > + dig_port = intel_attached_dig_port(connector); > > > > + > > > > /* I915 support for HDCP2.2 */ > > > > if (!hdcp->hdcp2_supported) > > > > return false; > > > > -- > > > > 2.26.2 > > > > > > > > _______________________________________________ > > > > Intel-gfx mailing list > > > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx