On Mon, Feb 01, 2021 at 11:07:20AM -0800, Lucas De Marchi wrote: > On Mon, Feb 01, 2021 at 08:33:32PM +0200, Ville Syrjälä wrote: > >From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > >Yank out the HSW/BDW code from intel_ddi_clk_{select,disable}() > >and put it into the new encoder .{enable,disable}_clock() vfuncs. > > > >Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > >--- > > drivers/gpu/drm/i915/display/intel_ddi.c | 32 +++++++++++++++++++----- > > 1 file changed, 26 insertions(+), 6 deletions(-) > > > >diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > >index da8bb9a2de0b..b46d7be1996b 100644 > >--- a/drivers/gpu/drm/i915/display/intel_ddi.c > >+++ b/drivers/gpu/drm/i915/display/intel_ddi.c > >@@ -3433,9 +3433,6 @@ static void intel_ddi_clk_select(struct intel_encoder *encoder, > > > > intel_de_write(dev_priv, DPLL_CTRL2, val); > > > >- } else if (INTEL_GEN(dev_priv) < 9) { > >- intel_de_write(dev_priv, PORT_CLK_SEL(port), > >- hsw_pll_to_ddi_pll_sel(pll)); > > } > > > > mutex_unlock(&dev_priv->dpll.lock); > >@@ -3458,12 +3455,30 @@ static void intel_ddi_clk_disable(struct intel_encoder *encoder) > > } else if (IS_GEN9_BC(dev_priv)) { > > intel_de_write(dev_priv, DPLL_CTRL2, > > intel_de_read(dev_priv, DPLL_CTRL2) | DPLL_CTRL2_DDI_CLK_OFF(port)); > >- } else if (INTEL_GEN(dev_priv) < 9) { > >- intel_de_write(dev_priv, PORT_CLK_SEL(port), > >- PORT_CLK_SEL_NONE); > > } > > } > > > >+static void hsw_ddi_enable_clock(struct intel_encoder *encoder, > >+ const struct intel_crtc_state *crtc_state) > >+{ > >+ struct drm_i915_private *dev_priv = to_i915(encoder->base.dev); > > since we are adding this new function, better to use i915 rather than > dev_priv. Hmm. Yeah, looks like we can do that in this case since PORT_CLK_SEL() doesn't depend on 'dev_priv'. I'm just too lazy to always check for that, and so I tend to do the rename only when there are no register accesses in the function. -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx