On Fri, Jan 29, 2021 at 07:06:33PM +0200, Imre Deak wrote: > On Thu, Jan 28, 2021 at 05:59:46PM +0200, Ville Syrjala wrote: > > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > > > Currently we only explicitly power up the combo PHY lanes > > for DP. The spec says we should do it for HDMI as well. > > > > Cc: stable@xxxxxxxxxxxxxxx > > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > --- > > drivers/gpu/drm/i915/display/intel_ddi.c | 2 ++ > > 1 file changed, 2 insertions(+) > > > > diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c > > index 88cc6e2fbe91..8fbeb8c24efb 100644 > > --- a/drivers/gpu/drm/i915/display/intel_ddi.c > > +++ b/drivers/gpu/drm/i915/display/intel_ddi.c > > @@ -4337,6 +4337,8 @@ static void intel_enable_ddi_hdmi(struct intel_atomic_state *state, > > intel_de_write(dev_priv, reg, val); > > } > > > > + intel_ddi_power_up_lanes(encoder, crtc_state); > > + > > Not sure if it matters, but the spec says to apply WA #1143 just before > enabling DDI_BUF_CTL. intel_ddi_power_up_lanes() is a nop for pre-icl, so we still do that. Also not sure what the final fate of that w/a will be since apparently it's not working as intended. That said I was debating with myself what order to put these in, but in the end I chose this order because the w/a is related to the vswing programming, and so wanted to keep it next to the BUF_TRANS programming. > > > > /* In HDMI/DVI mode, the port width, and swing/emphasis values > > * are ignored so nothing special needs to be done besides > > * enabling the port. > > -- > > 2.26.2 > > > > _______________________________________________ > > Intel-gfx mailing list > > Intel-gfx@xxxxxxxxxxxxxxxxxxxxx > > https://lists.freedesktop.org/mailman/listinfo/intel-gfx -- Ville Syrjälä Intel _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
