Since userspace cannot run without any subslices, it seems remarkable that any system would be configured with all fused off. Ignore the fuse register if it says 0. References: https://gitlab.freedesktop.org/drm/intel/-/issues/3022 Signed-off-by: Chris Wilson <chris@xxxxxxxxxxxxxxxxxx> --- drivers/gpu/drm/i915/gt/intel_sseu.c | 7 ++++--- 1 file changed, 4 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gt/intel_sseu.c b/drivers/gpu/drm/i915/gt/intel_sseu.c index 0d9f74aec8fe..99c992db2ce7 100644 --- a/drivers/gpu/drm/i915/gt/intel_sseu.c +++ b/drivers/gpu/drm/i915/gt/intel_sseu.c @@ -341,9 +341,10 @@ static void gen9_sseu_info_init(struct intel_gt *gt) * The subslice disable field is global, i.e. it applies * to each of the enabled slices. */ - subslice_mask = (1 << sseu->max_subslices) - 1; - subslice_mask &= ~((fuse2 & GEN9_F2_SS_DIS_MASK) >> - GEN9_F2_SS_DIS_SHIFT); + subslice_mask = (fuse2 & GEN9_F2_SS_DIS_MASK) >> GEN9_F2_SS_DIS_SHIFT; + if (!subslice_mask) /* Ignore the fuse if it says there is no HW */ + subslice_mask = ~0u; + subslice_mask &= GENMASK(sseu->max_subslices - 1, 0); /* * Iterate through enabled slices and subslices to -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
