On Tue, Jan 26, 2021 at 10:52:24AM -0800, Manasi Navare wrote:
> DSI transcoder does not support VRR and hence skip the HW state
> readout if its a DSI transcoder.
>
> Fixes: c7f0f4372b30 ("drm/i915/display: Add HW state readout for VRR")
> Cc: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> Cc: Jani Nikula <jani.nikula@xxxxxxxxxxxxxxx>
> Cc: Vandita Kulkarni <vandita.kulkarni@xxxxxxxxx>
> Signed-off-by: Manasi Navare <manasi.d.navare@xxxxxxxxx>
Reviewed-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_display.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_display.c b/drivers/gpu/drm/i915/display/intel_display.c
> index 65240fa074cc..aea8c5b3a7fd 100644
> --- a/drivers/gpu/drm/i915/display/intel_display.c
> +++ b/drivers/gpu/drm/i915/display/intel_display.c
> @@ -8978,7 +8978,7 @@ static bool hsw_get_pipe_config(struct intel_crtc *crtc,
> intel_get_transcoder_timings(crtc, pipe_config);
> }
>
> - if (HAS_VRR(dev_priv))
> + if (HAS_VRR(dev_priv) && !transcoder_is_dsi(pipe_config->cpu_transcoder))
> intel_vrr_get_config(crtc, pipe_config);
>
> intel_get_pipe_src_size(crtc, pipe_config);
> --
> 2.19.1
--
Ville Syrjälä
Intel
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