✓ Fi.CI.BAT: success for drm/i915/gt: Flush before changing register state

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Title: Project List - Patchwork
Patch Details
Series:drm/i915/gt: Flush before changing register state
URL:https://patchwork.freedesktop.org/series/86276/
State:success
Details:https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19496/index.html

CI Bug Log - changes from CI_DRM_9682 -> Patchwork_19496

Summary

SUCCESS

No regressions found.

External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19496/index.html

Known issues

Here are the changes found in Patchwork_19496 that come from known issues:

IGT changes

Issues hit

Possible fixes

{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).

Participating hosts (40 -> 35)

Missing (5): fi-jsl-1 fi-ilk-m540 fi-hsw-4200u fi-tgl-u2 fi-ctg-p8600

Build changes

CI-20190529: 20190529
CI_DRM_9682: 35ee6d505b478462c04952da1a4fbc03991af114 @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5971: abef2b7d6ff30f3b948b3e5d39653debb73083f3 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19496: 96e74e1408d6a5ad3af121289d83a22afcdcc2a7 @ git://anongit.freedesktop.org/gfx-ci/linux

== Linux commits ==

96e74e1408d6 drm/i915/gt: Flush before changing register state

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