Try to enable eDP Multi-SST Operation (MSO) on TGL. This is completely untested, no idea if it'll work or not. Missing pieces are at least: - Digging pixel overlap from DisplayID 2.0 - PSR - DSC BR, Jani. Jani Nikula (9): drm/dp: add MSO related DPCD registers drm/i915/edp: reject modes with dimensions other than fixed mode drm/i915/edp: always add fixed mode to probed modes in ->get_modes() drm/i915/edp: read sink MSO configuration for eDP 1.4+ drm/i915/reg: add stream splitter configuration definitions drm/i915/mso: add state readout for platforms that support it drm/i915/mso: add state check drm/i915/edp: modify fixed and downclock modes for MSO drm/i915/edp: enable eDP MSO during link training drivers/gpu/drm/i915/display/intel_ddi.c | 74 +++++++++++++++ drivers/gpu/drm/i915/display/intel_display.c | 4 + .../drm/i915/display/intel_display_types.h | 8 ++ drivers/gpu/drm/i915/display/intel_dp.c | 94 ++++++++++++++++--- drivers/gpu/drm/i915/i915_drv.h | 2 + drivers/gpu/drm/i915/i915_reg.h | 3 + include/drm/drm_dp_helper.h | 5 + 7 files changed, 179 insertions(+), 11 deletions(-) -- 2.20.1 _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
