On Mon, Jan 25, 2021 at 03:27:11PM +0200, Ville Syrjala wrote: > From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > > commit 1c4995b0a576d24bb7ead991fb037c8b47ab6e32 upstream. > > Let's not enable the 4:4:4->4:2:0 conversion bit in the DFP unless we're > actually outputting YCbCr 4:4:4. It would appear some protocol > converters blindy consult this bit even when the source is outputting > RGB, resulting in a visual mess. > > Cc: <stable@xxxxxxxxxxxxxxx> # 0e634efd858e: drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/ > Cc: stable@xxxxxxxxxxxxxxx > Closes: https://gitlab.freedesktop.org/drm/intel/-/issues/2914 > Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx> > Link: https://patchwork.freedesktop.org/patch/msgid/20210111164111.13302-1-ville.syrjala@xxxxxxxxxxxxxxx > Fixes: 181567aa9f0d ("drm/i915: Do YCbCr 444->420 conversion via DP protocol converters") > Reviewed-by: Jani Nikula <jani.nikula@xxxxxxxxx> > (cherry picked from commit 3170a21f7059c4660c469f59bf529f372a57da5f) > Signed-off-by: Jani Nikula <jani.nikula@xxxxxxxxx> > Link: https://patchwork.freedesktop.org/patch/msgid/20210118154355.24453-1-ville.syrjala@xxxxxxxxxxxxxxx > (cherry picked from commit 1c4995b0a576d24bb7ead991fb037c8b47ab6e32) > --- > Note the extra depdendency on commit 0e634efd858e > ("drm/i915: s/intel_dp_sink_dpms/intel_dp_set_power/"). Thanks for this, now queued up. greg k-h _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
