Series: | series starting with [CI,v5,01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check |
URL: | https://patchwork.freedesktop.org/series/86200/ |
State: | success |
Details: | https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19471/index.html |
CI Bug Log - changes from CI_DRM_9671 -> Patchwork_19471
Summary
SUCCESS
No regressions found.
External URL: https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_19471/index.html
Known issues
Here are the changes found in Patchwork_19471 that come from known issues:
IGT changes
Issues hit
-
igt@amdgpu/amd_basic@userptr:
- fi-byt-j1900: NOTRUN -> SKIP (fdo#109271) +17 similar issues
-
igt@i915_selftest@live@execlists:
- fi-tgl-u2: PASS -> INCOMPLETE (i915#2268)
-
igt@prime_self_import@basic-with_one_bo_two_files:
- fi-tgl-y: PASS -> DMESG-WARN (i915#402) +1 similar issue
-
igt@runner@aborted:
Possible fixes
-
igt@fbdev@write:
- fi-tgl-y: DMESG-WARN (i915#402) -> PASS +2 similar issues
-
igt@i915_module_load@reload:
- fi-kbl-7500u: DMESG-WARN (i915#2605) -> PASS
-
igt@i915_pm_rpm@module-reload:
- fi-byt-j1900: INCOMPLETE (i915#142 / i915#2405) -> PASS
{name}: This element is suppressed. This means it is ignored when computing
the status of the difference (SUCCESS, WARNING, or FAILURE).
Participating hosts (40 -> 37)
Missing (3): fi-ilk-m540 fi-bsw-cyan fi-hsw-4200u
Build changes
- Linux: CI_DRM_9671 -> Patchwork_19471
CI-20190529: 20190529
CI_DRM_9671: b91884d8aeac7dbad7ec084e4de0a5b2f596233b @ git://anongit.freedesktop.org/gfx-ci/linux
IGT_5964: 0949766cb9846d7d55fac9cdf31d3d8e8ed1d0c6 @ git://anongit.freedesktop.org/xorg/app/intel-gpu-tools
Patchwork_19471: 18720c9902829cfac4b7ded2f665dd7cb65c6cc2 @ git://anongit.freedesktop.org/gfx-ci/linux
== Linux commits ==
18720c990282 drm/i915: Fix vblank evasion with vrr
9eed16977998 drm/i915: Fix vblank timestamps with VRR
b1334816df79 drm/i915: Add vrr state dump
7f17d642e8f1 drm/i915/display: Helpers for VRR vblank min and max start
724f6a1f1ba3 drm/i915/display: Add HW state readout for VRR
bf13d338a8ff drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink
e8988415381c drm/i915/display/vrr: Disable VRR in modeset disable path
1837fb59b38f drm/i915/display/vrr: Send VRR push to flip the frame
e1f2da61b65e drm/i915/display/vrr: Configure and enable VRR in modeset enable
cae5397c3bb6 drm/i915: Rename VRR_CTL reg fields
3fdc3159d4da drm/i915/display: VRR + DRRS cannot be enabled together
c07ce2d2dd17 drm/i915/display/dp: Do not enable PSR if VRR is enabled
6c0a888785aa drm/i915/display/dp: Compute VRR state in atomic_check
35ab39f45ccc drm/i915: Extract intel_crtc_scanlines_since_frame_timestamp()
0915823391cc drm/i915: Extract intel_mode_vblank_start()
a563d636fc26 drm/i915: Store framestart_delay in dev_priv
46575a3d1f83 drm/i915/display/dp: Attach and set drm connector VRR property
aa71ea851089 drm/i915/display/vrr: Create VRR file and add VRR capability check
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