✗ Fi.CI.CHECKPATCH: warning for series starting with [CI,v5,01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check

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== Series Details ==

Series: series starting with [CI,v5,01/18] drm/i915/display/vrr: Create VRR file and add VRR capability check
URL   : https://patchwork.freedesktop.org/series/86200/
State : warning

== Summary ==

$ dim checkpatch origin/drm-tip
aa71ea851089 drm/i915/display/vrr: Create VRR file and add VRR capability check
-:37: WARNING:FILE_PATH_CHANGES: added, moved or deleted file(s), does MAINTAINERS need updating?
#37: 
new file mode 100644

-:82: WARNING:BLOCK_COMMENT_STYLE: Block comments should align the * on each line
#82: FILE: drivers/gpu/drm/i915/display/intel_vrr.h:4:
+ * Copyright © 2019 Intel Corporation
+*/

total: 0 errors, 2 warnings, 0 checks, 61 lines checked
46575a3d1f83 drm/i915/display/dp: Attach and set drm connector VRR property
a563d636fc26 drm/i915: Store framestart_delay in dev_priv
-:104: CHECK:SPACING: spaces preferred around that '-' (ctx:WxV)
#104: FILE: drivers/gpu/drm/i915/display/intel_display.c:15189:
+		val |= HSW_FRAME_START_DELAY(dev_priv->framestart_delay -1);
 		                                                        ^

total: 0 errors, 0 warnings, 1 checks, 102 lines checked
0915823391cc drm/i915: Extract intel_mode_vblank_start()
35ab39f45ccc drm/i915: Extract intel_crtc_scanlines_since_frame_timestamp()
6c0a888785aa drm/i915/display/dp: Compute VRR state in atomic_check
c07ce2d2dd17 drm/i915/display/dp: Do not enable PSR if VRR is enabled
3fdc3159d4da drm/i915/display: VRR + DRRS cannot be enabled together
cae5397c3bb6 drm/i915: Rename VRR_CTL reg fields
e1f2da61b65e drm/i915/display/vrr: Configure and enable VRR in modeset enable
1837fb59b38f drm/i915/display/vrr: Send VRR push to flip the frame
e8988415381c drm/i915/display/vrr: Disable VRR in modeset disable path
bf13d338a8ff drm/i915/display/vrr: Set IGNORE_MSA_PAR state in DP Sink
724f6a1f1ba3 drm/i915/display: Add HW state readout for VRR
-:59: WARNING:LONG_LINE: line length of 105 exceeds 100 columns
#59: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:164:
+		crtc_state->vrr.pipeline_full = REG_FIELD_GET(VRR_CTL_PIPELINE_FULL_MASK, trans_vrr_ctl);

-:61: WARNING:LONG_LINE: line length of 107 exceeds 100 columns
#61: FILE: drivers/gpu/drm/i915/display/intel_vrr.c:166:
+		crtc_state->vrr.flipline = intel_de_read(dev_priv, TRANS_VRR_FLIPLINE(cpu_transcoder)) + 1;

total: 0 errors, 2 warnings, 0 checks, 46 lines checked
7f17d642e8f1 drm/i915/display: Helpers for VRR vblank min and max start
b1334816df79 drm/i915: Add vrr state dump
9eed16977998 drm/i915: Fix vblank timestamps with VRR
-:11: WARNING:TYPO_SPELLING: 'minumum' may be misspelled - perhaps 'minimum'?
#11: 
off the scanline counter when it exceeds the minumum vtotal.
                                             ^^^^^^^

-:87: CHECK:SPACING: spaces preferred around that '<<' (ctx:VxV)
#87: FILE: drivers/gpu/drm/i915/display/intel_display_types.h:697:
+#define I915_MODE_FLAG_VRR (1<<6)
                              ^

total: 0 errors, 1 warnings, 1 checks, 81 lines checked
18720c990282 drm/i915: Fix vblank evasion with vrr


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