Quoting Huang, Sean Z (2021-01-19 07:43:09) > Set the KCR init during the boot time, which is > required by hardware, to allow us doing further > protection operation such as sending commands to > GPU or TEE. > > rev21: > - Remove "#define KCR_INIT_MASK_SHIFT (16)", but still keep the > macro in this .c file > - Write KCR_INIT reg inly for gen12 during boot, not required > for gen13+ > > Signed-off-by: Huang, Sean Z <sean.z.huang@xxxxxxxxx> > --- > drivers/gpu/drm/i915/pxp/intel_pxp.c | 9 +++++++++ > 1 file changed, 9 insertions(+) > > diff --git a/drivers/gpu/drm/i915/pxp/intel_pxp.c b/drivers/gpu/drm/i915/pxp/intel_pxp.c > index 9bc3c7e30654..4e9cee7df4f2 100644 > --- a/drivers/gpu/drm/i915/pxp/intel_pxp.c > +++ b/drivers/gpu/drm/i915/pxp/intel_pxp.c > @@ -6,6 +6,12 @@ > #include "intel_pxp.h" > #include "intel_pxp_context.h" > > +/* KCR register definitions */ > +#define KCR_INIT _MMIO(0x320f0) > + > +/* Setting KCR Init bit is required after system boot */ > +#define KCR_INIT_ALLOW_DISPLAY_ME_WRITES (BIT(14) | (BIT(14) << 16)) What Rodrigo was saying is that this is a classic masked register, so we should be doing: #define KCR_INIT_ALLOW_DISPLAY_ME_WRITES REG_BIT(14) intel_uncore_write(gt->uncore, KCR_INIT, _MASKED_BIT_ENABLE(KCR_INIT_ALLOW_DISPLAY_ME_WRITES)); -Chris _______________________________________________ Intel-gfx mailing list Intel-gfx@xxxxxxxxxxxxxxxxxxxxx https://lists.freedesktop.org/mailman/listinfo/intel-gfx
