On Mon, 2020-12-07 at 22:35 +0200, Ville Syrjala wrote:
> From: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
>
> The MH PHY vswing table does have all the entries these days. Get
> rid of the old hacks in the code which claim otherwise.
>
> This hack was totally bogus anyway. The correct way to handle the
> lack of those two entries would have been to declare our max
> vswing and pre-emph to both be level 2.
Reviewed-by: José Roberto de Souza <jose.souza@xxxxxxxxx>
>
> Cc: José Roberto de Souza <jose.souza@xxxxxxxxx>
> Cc: Clinton Taylor <clinton.a.taylor@xxxxxxxxx>
> Fixes: 9f7ffa297978 ("drm/i915/tc/icl: Update TC vswing tables")
> Signed-off-by: Ville Syrjälä <ville.syrjala@xxxxxxxxxxxxxxx>
> ---
> drivers/gpu/drm/i915/display/intel_ddi.c | 7 +++----
> 1 file changed, 3 insertions(+), 4 deletions(-)
>
> diff --git a/drivers/gpu/drm/i915/display/intel_ddi.c b/drivers/gpu/drm/i915/display/intel_ddi.c
> index 5193473c838c..c3a15ce66478 100644
> --- a/drivers/gpu/drm/i915/display/intel_ddi.c
> +++ b/drivers/gpu/drm/i915/display/intel_ddi.c
> @@ -2760,12 +2760,11 @@ static void icl_mg_phy_ddi_vswing_sequence(struct intel_encoder *encoder,
> u32 val;
>
>
>
>
> ddi_translations = icl_get_mg_buf_trans(encoder, crtc_state, &n_entries);
> - /* The table does not have values for level 3 and level 9. */
> - if (level >= n_entries || level == 3 || level == 9) {
> + if (level >= n_entries) {
> drm_dbg_kms(&dev_priv->drm,
> "DDI translation not found for level %d. Using %d instead.",
> - level, n_entries - 2);
> - level = n_entries - 2;
> + level, n_entries - 1);
> + level = n_entries - 1;
> }
>
>
>
>
> /* Set MG_TX_LINK_PARAMS cri_use_fs32 to 0. */
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